LOGIC COMMANDS AND REGISTERS Figure 22. In" />
參數(shù)資料
型號(hào)： KIT908EINTFC
廠商： Freescale Semiconductor
文件頁(yè)數(shù)： 29/49頁(yè)
文件大?。?/td> 0K
描述： KIT EVAL 908E625 QUAD W/MCU/LIN
標(biāo)準(zhǔn)包裝： 1
Analog Integrated Circuit Device Data
Freescale Semiconductor
35
908E625
FUNCTIONAL DEVICE OPERATION
LOGIC COMMANDS AND REGISTERS
Figure 22. Inrush Current Limiter on High Side Output
SWITCHABLE VDD OUTPUT (HVDD)
The HVDD pin is a switchable VDD output pin. It can be
used for driving external circuitry that requires a VDD voltage.
The output is enabled with bit PSON in the system control
register and can be switched on/off with bit HVDDON in the
power output register. Low or high voltage conditions (LVI/
HVI) have no influence on this circuitry.
HVDD OVER-TEMPERATURE PROTECTION
Over-temperature protection is enabled if the high
temperature reset is enabled.
HVDD OVER-CURRENT PROTECTION
The HVDD output is protected against over-current. In the
event the over-current limit is or was reached, the output
automatically switches off and the HVDD over-current flag in
the system status register is set.
SYSTEM CONTROL REGISTER (SYSCTL)
Power Stages On Bit (PSON)
This read/write bit enables the power stages (half-bridges,
high side, LIN transmitter, Analog Input PA1 current sources,
and HVDD output). Reset clears the PSON bit.
1 = Power stages enabled.
0 = Power stages disabled.
LIN Slew Rate Selection Bits (SRS0:SRS1)
These read/write bits enable the user to select the
appropriate LIN slew rate for different baud rate
configurations as shown in Table 11.
The high speed slew rates are used, for example, for
programming via the LIN and are not intended for use in the
application.
HS Current
HS Over-current Shutdown Threshold
FGEN Input
(MCU PWM
Signal)
t
Register Name and Address: SYSCTL - $03
Bits
7
6
5
4
3
2
1
0
Read
PSON SRS1
SRS0
0
Write
GS
Reset
00
000
00
0
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