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| 型號： | KIT908EINTFC |
| 廠商： | Freescale Semiconductor |
| 文件頁數(shù)： | 36/49頁 |
| 文件大小： | 0K |
| 描述： | KIT EVAL 908E625 QUAD W/MCU/LIN |
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Analog Integrated Circuit Device Data
Freescale Semiconductor
41
908E625
TYPICAL APPLICATIONS
FACTORY TRIMMING AND CALIBRATION
EMC/EMI RECOMMENDATIONS
This paragraph gives some device specific
recommendations to improve EMC/EMI performance.
Further generic design recommendations can be e.g. found
on the Freescale web site www.freescale.com.
VSUP pins (VSUP1:VSUP3)
Its recommended to place a high-quality ceramic
decoupling capacitor close to the VSUP pins to improve
EMC/EMI behavior.
LIN pin
For DPI (Direct Power Injection) and ESD (Electro Static
Discharge) its recommended to place a high quality ceramic
decoupling capacitor near the LIN pin. An additional varistor
will further increase the immunity against ESD. A ferrite in the
LIN line will suppress some of the noise induced.
Voltage regulator output pins (VDD and AGND)
Use a high quality ceramic decoupling capacitor to
stabilize the regulated voltage.
MCU digital supply pins (EVDD and EVSS)
Fast signal transitions on MCU pins place high, short-
duration current demands on the power supply. To prevent
noise problems, take special care to provide power supply
bypassing at the MCU. It is recommended that a high quality
ceramic decoupling capacitor be placed between these pins.
MCU analog supply pins (VREFH, VDDA and VREFL,
VSSA)
To avoid noise on the analog supply pins its important to
take special care on the layout. The MCU digital and analog
supplies should be tied to the same potential via separate
traces and connected to the voltage regulator output.
schematics and layout level and Table 13 indicates
recommended external components and layout
considerations.
Figure 25. EMC/EMI Recommendations
MM908E625
VREFL
VDDA
EVDD
VDD
EVSS
VSS
VSUP1
GND1
VSUP
+
VREFH
VSSA
VSUP2
LIN
C1
C2
D1
C3
C4
C5
L1
V1
VSUP3
GND2
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