參數(shù)資料
型號： KM4232W259A
廠商： SAMSUNG SEMICONDUCTOR CO. LTD.
英文描述： CMOS Window RAM（1M Byte Dual Ported DRAM Array）(CMOS視窗RAM（1M字節(jié)的雙口動態(tài)RAM陣列）)
中文描述： 窗口的CMOS內(nèi)存（1M字節(jié)雙端口內(nèi)存陣列）（視窗的CMOS存儲器（100萬字節(jié)的雙口動態(tài)內(nèi)存陣列））
文件頁數(shù)： 16/46頁
文件大?。?/td> 836K
代理商： KM4232W259A
KM4232W259A
CMOS WINDOW RAM
Rev.0 (August 1997)
How Color Registers(0/1) ties to BW8
The color register(#0 or #1) should be loaded with the pixel color data(in this case, red color=10101010) from 32 I/O pins with a LCR
cycle.
Repeat the above steps to write NA NA NA NA pixel data(background data)
Cycles reguired for this operation :
1 0 0 0 0 0 0 1 0 1 1 1 1 1 1 0 0 1 1 1 1 1 1 0 1 0 1 0 1 0 1 0
DATA FOR PIXEL#
3, 7, 11, 15, 19,
23, 27, 31
22, 26, 30
b31
MSB BLUE COLOR
b0
GREEN COLOR
GREEN COLOR
RED COLOR
LSB
DATA FOR PIXEL#
2, 6, 10, 14, 18,
DATA FOR PIXEL#
1, 5, 9, 13, 17,
21, 25, 29
DATA FOR PIXEL#
0, 4, 8, 12, 16,
20, 24, 28
COLOR
REGISTER
#0 OR #1
Masking out Pixel # < 15: 8 > and # < 31:20>
Use byte masking(8bpp=> pixel masking) function from BW8 mode at the falling edge of CAS.
In this BW8 cycle with byte masking, the 32-bit Data Write Mask(W
0
-W
31
) should be provided as follows.
0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1
W
31
MSB
W
0
LSB
1 => Enable the Byte write
0 => Disable the Byte write
W<7:0> enable the write buffers ; allow pixel<7:0> not to be masked.
W<19:16> enable the write buffers ; allow pixel<19:16> not to be masked.
W<15:8> & W<31:20> disable the write buffers ; allow pixel #<15:8> & #<31:20>> to be masked.
Each of these bits can be used to mask("0") or not mask("1") the whole 8-bit pixel data.
Use BW8 mode to write R G G B pixels data(foreground data).
(Foreground R G G B)
- LCR
- Byte mask info // UFBW8
(Background NA NA NA NA) - LCR
- Byte mask info // UFBW8
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