- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄374355 > KM44C4105C (SAMSUNG SEMICONDUCTOR CO. LTD.) 4M x 4Bit CMOS Quad CAS DRAM with Extended Data Out(4M x 4位 CMOS 四CAS 動態(tài)RAM(帶擴展數(shù)據(jù)輸出)) PDF資料下載
參數(shù)資料
| 型號： | KM44C4105C |
| 廠商： | SAMSUNG SEMICONDUCTOR CO. LTD. |
| 英文描述： | 4M x 4Bit CMOS Quad CAS DRAM with Extended Data Out(4M x 4位 CMOS 四CAS 動態(tài)RAM(帶擴展數(shù)據(jù)輸出)) |
| 中文描述： | 4米× 4位的CMOS DRAM與中科院四擴展數(shù)據(jù)輸出（4米× 4位的CMOS四中科院動態(tài)隨機存儲器（帶擴展數(shù)據(jù)輸出）） |
| 文件頁數(shù)： | 5/20頁 |
| 文件大小： | 363K |
| 代理商： | KM44C4105C |
CMOS DRAM
KM44C4005C, KM44C4105C
CAPACITANCE
(T
A
=25
°
C, V
CC
=5V, f=1MHz)
Parameter
Symbol
Min
Max
Units
Input capacitance [A0 ~ A11]
C
IN1
-
5
pF
Input capacitance [RAS, CASx, W, OE]
C
IN2
-
7
pF
Output capacitance [DQ0 - DQ3]
C
DQ
-
7
pF
Test condition : V
CC
=5.0V
±
10%, Vih/Vil=2.4/0.8V, Voh/Vol=2.0/0.8V
Parameter
Symbol
-5
-6
Units
Notes
Min
Max
Min
Max
Random read or write cycle time
t
RC
t
RWC
84
104
ns
Read-modify-write cycle time
106
140
ns
Access time from RAS
t
RAC
t
CAC
50
60
ns
3,4,10
Access time from CAS
13
15
ns
3,4,5,20
Access time from column address
t
AA
t
CLZ
25
30
ns
3,10
CAS to output in Low-Z
3
3
ns
3,20
Output buffer turn-off delay from CAS
t
CEZ
t
OLZ
3
13
3
15
ns
6,13
OE to output in Low-Z
3
3
ns
3
Transition time (rise and fall)
t
T
t
RP
2
50
2
50
ns
2
RAS precharge time
30
40
ns
RAS pulse width
t
RAS
t
RSH
50
10K
60
10K
ns
RAS hold time
13
15
ns
16
CAS hold time
t
CSH
t
CAS
38
45
ns
19
CAS pulse width
8
10K
10
10K
ns
25
RAS to CAS delay time
t
RCD
t
RAD
20
37
20
45
ns
4,18
RAS to column address delay time
15
25
15
30
ns
10
CAS to RAS precharge time
t
CRP
t
ASR
5
5
ns
17
Row address set-up time
0
0
ns
Row address hold time
t
RAH
t
ASC
10
10
ns
Column address set-up time
0
0
ns
18
Column address hold time
t
CAH
t
RAL
8
10
ns
18
Column address to RAS lead time
25
30
ns
Read command set-up time
t
RCS
t
RCH
0
0
ns
Read command hold time referenced to CAS
0
0
ns
8,17
Read command hold time referenced to RAS
t
RRH
t
WCH
0
0
ns
8
Write command hold time
10
10
ns
16
Write command pulse width
t
WP
t
RWL
10
10
ns
Write command to RAS lead time
13
15
ns
Write command to CAS lead time
t
CWL
8
10
ns
19
AC CHARACTERISTICS
(0
°
C
≤
T
A
≤
70
°
C, See note 1,2)
相關PDF資料 |
PDF描述 |
|---|---|
| KM44C4103C | 4M x 4Bit CMOS Quad CAS DRAM with Fast Page Mode(4M x 4位CMOS四CAS 動態(tài)RAM(帶快速頁模式)) |
| KM44C4003C | 4M x 4Bit CMOS Quad CAS DRAM with Fast Page Mode(4M x 4位CMOS四CAS 動態(tài)RAM(帶快速頁模式)) |
| KM44C4104C | 4M x 4Bit CMOS Dynamic RAM with Extended Data Out(4M x 4位 CMOS 動態(tài)RAM(帶擴展數(shù)據(jù)輸出)) |
| KM44C4004C | 4M x 4Bit CMOS Dynamic RAM with Extended Data Out(4M x 4位 CMOS 動態(tài)RAM(帶擴展數(shù)據(jù)輸出)) |
| KM44V4004C | 4M x 4Bit CMOS Dynamic RAM with Extended Data Out(4M x 4位 CMOS 動態(tài)RAM(帶擴展數(shù)據(jù)輸出)) |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| KM44L16031BT-GFZ/Y/0 | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:DDR SDRAM Specification Version 0.61 |
| KM44L32031BT-G(F)0 | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:DDR SDRAM Specification Version 0.61 |
| KM44L32031BT-G(F)Y | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:DDR SDRAM Specification Version 0.61 |
| KM44L32031BT-G(F)Z | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:DDR SDRAM Specification Version 0.61 |
| KM44L32031BT-G(L)0 | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:DDR SDRAM Specification Version 1.0 |
發(fā)布緊急采購，3分鐘左右您將得到回復。