參數(shù)資料
型號: KSZ8051MNLI
廠商: Micrel Inc
文件頁數(shù): 1/59頁
文件大?。?/td> 0K
描述: TXRX PHY 10/T100 3.3V 32QFN
標(biāo)準(zhǔn)包裝: 640
類型: PHY 收發(fā)器
驅(qū)動器/接收器數(shù): 1/1
規(guī)程: MII
電源電壓: 1.8V,2.5V,3.3V
安裝類型: 表面貼裝
封裝/外殼: 32-VFQFN 裸露焊盤
供應(yīng)商設(shè)備封裝: 32-QFN(5x5)
包裝: 托盤
配用: 576-3865-ND - BOARD EVALUATION FOR KSZ8051MNL
其它名稱: 576-3845
KSZ8051MNL/RNL
10Base-T/100Base-TX
Physical Layer Transceiver
LinkMD is a registered trademark of Micrel, Inc.
Micrel Inc. 2180 Fortune Drive San Jose, CA 95131 USA tel +1 (
408) 944-0800 fax + 1 (408) 474-1000 http://www.micrel.com
July 2010
M9999-070910-1.0
General Description
The KSZ8051 is a single supply 10Base-T/100Base-TX
Ethernet physical layer transceiver for transmission and
reception of data over standard CAT-5 unshielded twisted
pair (UTP) cable.
The KSZ8051 is a highly integrated, compact solution. It
reduces board cost and simplifies board layout by using
on-chip termination resistors for the differential pairs and
by integrating a low noise regulator to supply the 1.2V
core.
The KSZ8051MNL offers the Media Independent Interface
(MII) and the KSZ8051RNL offers the Reduced Media
Independent Interface (RMII) for direct connection with MII/
RMII compliant Ethernet MAC processors and switches.
A 25MHz crystal is used to generate all required clocks,
including the 50MHz RMII reference clock output for the
KSZ8051RNL.
The KSZ8051 provides diagnostic features to facilitate
system bring-up and debugging in production testing and
in product deployment. Parametric NAND tree support
enables fault detection between KSZ8051 I/Os and board.
Micrel LinkMD
TDR-based cable diagnostics permit
identification of faulty copper cabling.
The KSZ8051MNL and KSZ8051RNL are available in 32-
pin, lead-free QFN packages (See Ordering Information).
Data sheets and support documentation can be found on
Micrel’s web site at: www.micrel.com.
Features
Single-chip 10Base-T/100Base-TX IEEE 802.3
compliant Ethernet Transceiver
MII Interface support (KSZ8051MNL)
RMII v1.2 Interface support with 50MHz reference clock
output to MAC, and option to input 50MHz reference
clock (KSZ8051RNL)
Back-to-Back mode support for 100Mbps copper
repeater or media converter
MDC/MDIO Management Interface for PHY register
configuration
Programmable interrupt output
LED outputs for link, activity and speed status indication
On-chip termination resistors for the differential pairs
Baseline Wander Correction
HP Auto MDI/MDI-X for reliable detection and
correction for straight-through and crossover cables
with disable and enable option
Auto-negotiation to automatically select the highest link
up speed (10/100 Mbps) and duplex (half/full)
Power down and power saving modes
LinkMD TDR-based cable diagnostics for identification
of faulty copper cabling
Parametric NAND Tree support for fault detection
between chip I/Os and board.
____________________________________________________________________________________________________________
Functional Diagram
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