參數資料
型號: KSZ8051MNLI
廠商: Micrel Inc
文件頁數: 9/59頁
文件大?。?/td> 0K
描述: TXRX PHY 10/T100 3.3V 32QFN
標準包裝: 640
類型: PHY 收發(fā)器
驅動器/接收器數: 1/1
規(guī)程: MII
電源電壓: 1.8V,2.5V,3.3V
安裝類型: 表面貼裝
封裝/外殼: 32-VFQFN 裸露焊盤
供應商設備封裝: 32-QFN(5x5)
包裝: 托盤
配用: 576-3865-ND - BOARD EVALUATION FOR KSZ8051MNL
其它名稱: 576-3845
Micrel, Inc.
KSZ8051MNL/RNL
July 2010
17
M9999-070910-1.0
Pin Number
Pin Name
Type
(1)
Pin Function
32
RST#
I
Chip Reset (active low)
PADDLE
GND
Gnd
Ground
Notes:
1.
P = Power supply.
Gnd = Ground.
I = Input.
O = Output.
I/O = Bi-directional.
Ipu/O = Input with internal pull-up (see Electrical Characteristics for value) during power-up/reset; output pin otherwise.
Ipd/O = Input with internal pull-down (see Electrical Characteristics for value) during power-up/reset; output pin otherwise.
Ipu/Opu = Input with internal pull-up (see Electrical Characteristics for value) during power-up/reset; output pin with internal pull-up (see Electrical
Characteristics for value) otherwise.
2.
RMII Rx Mode: The RXD[1:0] bits are synchronous with the 50MHz RMII Reference Clock. For each clock period in which CRS_DV is asserted,
two bits of recovered data are sent by the PHY to the MAC.
3.
RMII Tx Mode: The TXD[1:0] bits are synchronous with the 50MHz RMII Reference Clock . For each clock period in which TXEN is asserted, two
bits of data are received by the PHY from the MAC.
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KSZ8051MNLITR 制造商:Micrel 功能描述:Ethernet TXRX PHY 10 T100 3.3V 32 QFN
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KSZ8051MNL-TR 功能描述:1/1 Transceiver Full MII 32-QFN (5x5) 制造商:microchip technology 系列:- 包裝:剪切帶(CT) 零件狀態(tài):過期 類型:收發(fā)器 協(xié)議:MII 驅動器/接收器數:1/1 雙工:全 接收器滯后:- 數據速率:- 電壓 - 電源:1.8V,2.5V,3.3V 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:32-VFQFN 裸露焊盤 供應商器件封裝:32-QFN(5x5) 標準包裝:1
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