參數(shù)資料
型號： KSZ8841-16MVLI
廠商： Micrel Inc
文件頁數(shù)： 33/105頁
文件大?。?/td> 0K
描述： IC MAC CTRLR 8/16BIT 128-LQFP
標(biāo)準(zhǔn)包裝： 90
控制器類型： 以太網(wǎng)控制器，MAC
接口： 總線
電源電壓： 3.1 V ~ 3.5 V
工作溫度： -40°C ~ 85°C
安裝類型： 表面貼裝
封裝/外殼： 128-LQFP
供應(yīng)商設(shè)備封裝： 128-LQFP（14x14）
包裝： 托盤
產(chǎn)品目錄頁面： 1081 (CN2011-ZH PDF)
配用： 576-1632-ND - BOARD EVALUATION KSZ8841-16MVL
其它名稱： 576-2114
KSZ8841-16MVLI-ND
Micrel, Inc.
KSZ8841-16/32 MQL/MVL/MBL
October 2007
33
M9999-102207-1.6
control is based on availability of the system resources.
The KSZ8841M issues a flow control frame (Xoff, or transmitter off), containing the maximum pause time defined in IEEE
standard 802.3x. Once the resource is freed up, the KSZ8841M sends out the another flow control frame (Xon, or
transmitter on) with zero pause time to turn off the flow control (turn on transmission to the port). A hysteresis feature is
provided to prevent the flow control mechanism from being constantly activated and deactivated.
Half-Duplex Backpressure
A half-duplex backpressure option (non-IEEE 802.3 standards) is also provided. The activation and deactivation
conditions are the same as in full-duplex mode. If backpressure is required, the KSZ8841M sends preambles to defer the
other stations' transmission (carrier sense deference).
To avoid jabber and excessive deference (as defined in the 802.3 standard), after a certain time, the KSZ8841M
discontinues the carrier sense and then raises it again quickly. This short silent time (no carrier sense) prevents other
stations from sending out packets thus keeping other stations in a carrier sense deferred state. If the port has packets to
send during a backpressure situation, the carrier sense type backpressure is interrupted and those packets are
transmitted instead. If there are no additional packets to send, carrier sense type backpressure is reactivated again until
chip resources free up. If a collision occurs, the binary exponential back-off algorithm is skipped and carrier sense is
generated immediately, thus reducing the chance of further collision and carrier sense is maintained to prevent packet
reception.
Clock Generator
The X1 and X2 pins are connected to a 25MHz crystal. X1 can also serve as the connector to a 3.3V, 25MHz oscillator
(as described in the pin description).
The bus interface unit (BIU) uses BCLK (Bus Clock) for synchronous accesses. The maximum frequency is 50MHz for
VLBus-like and EISA-like slave direct memory access (DMA).
Bus Interface Unit (BIU)
The BIU host interface is a generic bus interface, designed to communicate with embedded processors. The use of glue
logic may be required when it talks to various standard buses and processors.
Supported Transfers
In terms of transfer type, the BIU can support two transfers: asynchronous transfer and synchronous transfer. To support
these transfers (asynchronous and synchronous), the BIU provides three groups of signals:
Synchronous signals
Asynchronous signals
Common signals are used for both synchronous and asynchronous transfers.
Since both synchronous and asynchronous signals are independent of each other, synchronous transfer and
asynchronous transfer can be mixed or interleaved but cannot be overlapped (due to the sharing of common signals).
Physical Data Bus Size
The BIU supports an 8-bit, 16-bit, or 32-bit host standard data bus. Depending on the size of the physical data bus, the
KSZ8841M supports 8-bit, 16-bit, or 32-bit data transfers
For example,
For a 32-bit system/host data bus, the KSZ8841M allows an 8-bit, 16-bit, and 32-bit data transfer (KSZ8841-32MQL).
For a 16-bit system/host data bus, the KSZ8841M allows an 8-bit and 16-bit data transfer (KSZ8841-16MQL).
For an 8-bit system/host data bus, the KSZ8841M only allows an 8-bit data transfer (KSZ8841-16MQL).
The KSZ8841M does not support internal data byte-swap but it does support internal data word-swap. This means that
the system/host data bus HD[7:0] must connect to both D[7:0] and D[15:8] for an 8-bit data bus interface. For a 16-bit data
bus, the system/host data bus HD[15:8] and HD[7:0] only need to connect to D[15:8] and D[7:0] respectively, and there is
no need to connect HD[15:8] and HD[7:0] to D[31:24] and D[23:16].
Table 2 describes the BIU signal grouping.
相關(guān)PDF資料
PDF描述
KSZ8842-16MBL IC MAC CTLR 2PORT ETH 100-LFBGA
PIC16F630-E/P IC MCU FLASH 1KX14 14DIP
V72A48C400BF CONVERTER MOD DC/DC 48V 400W
VNC2-48L1B-REEL IC USB HOST/DEVICE CTRL 48-LQFP
V72A48C400BL3 CONVERTER MOD DC/DC 48V 400W
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
KSZ8841-16MVLI TR 功能描述:以太網(wǎng) IC Single Ethernet Port + Generic (8, 16-bit) bus interface(Lead Free) RoHS:否 制造商:Micrel 產(chǎn)品:Ethernet Switches 收發(fā)器數(shù)量:2 數(shù)據(jù)速率:10 Mb/s, 100 Mb/s 電源電壓-最大:1.25 V, 3.45 V 電源電壓-最小:1.15 V, 3.15 V 最大工作溫度:+ 85 C 封裝 / 箱體:QFN-64 封裝:Tray
KSZ8841-32MQL 功能描述:以太網(wǎng) IC Single Ethernet Port + Generic (32-bit) bus interface(Lead Free) RoHS:否 制造商:Micrel 產(chǎn)品:Ethernet Switches 收發(fā)器數(shù)量:2 數(shù)據(jù)速率:10 Mb/s, 100 Mb/s 電源電壓-最大:1.25 V, 3.45 V 電源電壓-最小:1.15 V, 3.15 V 最大工作溫度:+ 85 C 封裝 / 箱體:QFN-64 封裝:Tray
KSZ8841-32MVL 功能描述:以太網(wǎng) IC Single Ethernet Port + Generic (32-bit) bus interface(Lead Free) RoHS:否 制造商:Micrel 產(chǎn)品:Ethernet Switches 收發(fā)器數(shù)量:2 數(shù)據(jù)速率:10 Mb/s, 100 Mb/s 電源電壓-最大:1.25 V, 3.45 V 電源電壓-最小:1.15 V, 3.15 V 最大工作溫度:+ 85 C 封裝 / 箱體:QFN-64 封裝:Tray
KSZ8841-32MVLI 功能描述:以太網(wǎng) IC Single Ethernet Port + Generic (32-bit) bus interface(Lead Free) RoHS:否 制造商:Micrel 產(chǎn)品:Ethernet Switches 收發(fā)器數(shù)量:2 數(shù)據(jù)速率:10 Mb/s, 100 Mb/s 電源電壓-最大:1.25 V, 3.45 V 電源電壓-最小:1.15 V, 3.15 V 最大工作溫度:+ 85 C 封裝 / 箱體:QFN-64 封裝:Tray
KSZ8841P 制造商:MICREL 制造商全稱:Micrel Semiconductor 功能描述:Ethernet MAC Controller with PCI Interface
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。

采購需求

(若只采購一條型號，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進(jìn)入我的后臺，查看報價

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進(jìn)入我的后臺，查看報價

*型號 *數(shù)量 廠商 批號 封裝
添加更多采購

我的聯(lián)系方式

*
*
*