參數(shù)資料
型號(hào)： KSZ8851-32MQLI
廠商： Micrel Inc
文件頁數(shù)： 10/88頁
文件大?。?/td> 0K
描述： IC CTLR MAC/PHY NON PCI 128PQFP
標(biāo)準(zhǔn)包裝： 66
控制器類型： 以太網(wǎng)控制器，MAC/PHY
接口： 總線
電源電壓： 1.8V，2.5V，3.3V
工作溫度： -40°C ~ 85°C
安裝類型： 表面貼裝
封裝/外殼： 128-BFQFP
供應(yīng)商設(shè)備封裝： 128-PQFP（14x20）
包裝： 托盤
其它名稱： 576-3630
KSZ8851-32MQLI-ND
Micrel, Inc.
KSZ8851-16/32 MQL/MQLI
August 2009
18
M9999-083109-2.0
Pin Number
Pin Name
Type
Pin Function
18
RDN
Ipu
Read Strobe Not
Asynchronous read strobe, active Low.
19
EECS
Opd
EEPROM Chip Select
This signal is used to select an external EEPROM device.
20
ARDY
Opu
Asynchronous Ready
ARDY may be used when interfacing asynchronous buses to extend bus access cycles. It
is asynchronous to the host CPU or bus clock. This pin need an external 4.7K pull-up
resistor.
21
NC
—
No Connect.
22
NC
—
No Connect
23
DGND
Gnd
Digital IO ground
24
VDDCO
P
1.8V regulator output . This 1.8V output pin provides power to pins 38, 43, 57 (VDDA), 63
(VDDAP) and 91 (VDDC) for core VDD supply.
If VDD_IO is set for 1.8V then this pin should be left floating, pins 38, 43, 57 (VDDA), 63
(VDDAP) and 91 (VDDC) will be sourced by the external 1.8V supply that is tied to pins
10, 79, 92, 108 and 125 (VDDIO) with appropriate filtering.
25
NC
—
No Connect.
26
EEEN
Ipd
EEPROM Enable
EEPROM is enabled and connected when this pin is pull-up.
EEPROM is disabled when this pin is pull-down or no connect.
27
P1LED3
Opd
Port 1 LED indicator
See the description in pins 3, 4, and 5.
28
EEDO
Opd
EEPROM Data Out
This pin is connected to DI input of the serial EEPROM.
29
EESK
Ipd/O
EEPROM Serial Clock: A 4
μs (OBCR[1:0]=11 on-chip bus speed @ 25MHz) or 800ns
(OBCR[1:0]=00 on-chip bus speed @ 125MHz) serial output clock cycle to load
configuration data from the serial EEPROM.
Config Mode: The pull-up/pull-down value is latched as big or little endian mode during
power-up / reset. See “Strapping Options” section for details
30
EEDI
Ipd
EEPROM Data In
This pin is connected to DO output of the serial EEPROM when EEEN is pull-up.
This pin is “don’t care” (no connect) for 32-bit bus mode when EEEN is pull-down (without
EEPROM).
31
NC
—
No Connect.
32
AEN
Ipu
Address Enable
Address and chip select qualifier for the address decoding and chip enable, active Low.
33
WRN
Ipu
Write Strobe Not
Asynchronous write strobe, active Low.
34
DGND
Gnd
Digital IO ground
35
NC
—
No Connect.
36
PWRDN
Ipu
Full-chip power-down. Active Low (Low = Power down; High or floating = Normal
operation). All I/O pins will tri-state during chip power down.
37
AGND
Gnd
Analog ground
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