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| 型號(hào)： | KSZ8851-32MQLI |
| 廠商： | Micrel Inc |
| 文件頁(yè)數(shù)： | 72/88頁(yè) |
| 文件大?。?/td> | 0K |
| 描述： | IC CTLR MAC/PHY NON PCI 128PQFP |
| 標(biāo)準(zhǔn)包裝： | 66 |
| 控制器類型： | 以太網(wǎng)控制器，MAC/PHY |
| 接口： | 總線 |
| 電源電壓： | 1.8V，2.5V，3.3V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 128-BFQFP |
| 供應(yīng)商設(shè)備封裝： | 128-PQFP（14x20） |
| 包裝： | 托盤 |
| 其它名稱： | 576-3630 KSZ8851-32MQLI-ND |
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PIC16F83/84
PIC16F8X
1998 Microchip Technology Inc.
DS30430C-page 75
11.0
ELECTRICAL CHARACTERISTICS FOR PIC16F83 AND PIC16F84
Absolute Maximum Ratings
Ambient temperature under bias............................................................................................................ .-55
°C to +125°C
Storage temperature .............................................................................................................................. -65
°C to +150°C
Voltage on VDD with respect to VSS ........................................................................................................... -0.3 to +7.5V
Voltage on MCLR with respect to VSS(2) .......................................................................................................-0.3 to +14V
Voltage on any pin with respect to VSS (except VDD and MCLR).................................................... -0.6V to (VDD + 0.6V)
Total power dissipation(1) ..................................................................................................................................... 800 mW
Maximum current out of VSS pin ........................................................................................................................... 150 mA
Maximum current into VDD pin .............................................................................................................................. 100 mA
Input clamp current, IIK (VI < 0 or VI > VDD)
..................................................................................................................... ± 20 mA
Output clamp current, IOK (VO < 0 or VO > VDD)
............................................................................................................. ± 20 mA
Maximum output current sunk by any I/O pin..........................................................................................................25 mA
Maximum output current sourced by any I/O pin .................................................................................................... 20 mA
Maximum current sunk by PORTA ..........................................................................................................................80 mA
Maximum current sourced by PORTA ..................................................................................................................... 50 mA
Maximum current sunk by PORTB........................................................................................................................ 150 mA
Maximum current sourced by PORTB................................................................................................................... 100 mA
Note 1: Power dissipation is calculated as follows: Pdis = VDD x {IDD -
∑ IOH} + ∑ {(VDD-VOH) x IOH} + ∑(VOl x IOL)
Note 2: Voltage spikes below VSS at the MCLR pin, inducing currents greater than 80 mA, may cause latch-up. Thus,
a series resistor of 50-100
should be used when applying a “l(fā)ow” level to the MCLR pin rather than pulling
this pin directly to VSS.
NOTICE: Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the
device. This is a stress rating only and functional operation of the device at those or any other conditions above
those indicated in the operation listings of this specification is not implied. Exposure to maximum rating conditions for
extended periods may affect device reliability.
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