Micrel, Inc.
KSZ8873MLLJ
September 2011
10
M9999-091911-1.8
List of Tables
Table 1. MDI/MDI-X Pin Definitions ..................................................................................................................................... 18
Table 2. Internal Function Block Status ................................................................................................................................ 23
Table 3. MII Signals ............................................................................................................................................................. 28
Table 4. MII Management Interface Frame Format ............................................................................................................. 29
Table 5. Serial Management Interface (SMI) Frame Format ............................................................................................... 30
Table 6. FID+DA Lookup in VLAN Mode ............................................................................................................................. 31
Table 7. FID+SA Lookup in VLAN Mode ............................................................................................................................. 31
Table 8. Spanning Tree States ............................................................................................................................................ 33
Table 9. SPI Connections .................................................................................................................................................... 38
Table 10. Data Rate Limit Table .......................................................................................................................................... 60
Table 11. Format of Static MAC Table (8 Entries)............................................................................................................... 84
Table 12. Format of Static VLAN Table (16 Entries)............................................................................................................ 86
Table 13. Format of Dynamic MAC Address Table (1K Entries) ......................................................................................... 87
Table 14. Format of “Per Port” MIB Counters ...................................................................................................................... 88
Table 15. Port 1’s “Per Port” MIB Counters Indirect Memory Offsets.................................................................................. 89
Table 16. Format of “All Port Dropped Packet” MIB Counters............................................................................................. 90
Table 17. “All Port Dropped Packet” MIB Counters Indirect Memory Offsets...................................................................... 90
Table 18. EEPROM Timing Parameters .............................................................................................................................. 94
Table 19. MAC Mode MII Timing Parameters...................................................................................................................... 95
Table 20. PHY Mode MII Timing Parameters ...................................................................................................................... 96
Table 21. RMII Timing Parameters ...................................................................................................................................... 97
Table 22. I2C Timing Parameters ........................................................................................................................................ 99
Table 23. SPI Input Timing Parameters............................................................................................................................. 100
Table 24. SPI Output Timing Parameters .......................................................................................................................... 101
Table 25. Auto-Negotiation Timing Parameters................................................................................................................. 102
Table 26. MDC/MDIO Timing Parameters ......................................................................................................................... 103
Table 27. Reset Timing Parameters .................................................................................................................................. 104
Table 28. Transformer Selection Criteria ........................................................................................................................... 106
Table 29. Qualified Single Port Magnetics......................................................................................................................... 106
Table 30. Typical Reference Crystal Characteristics......................................................................................................... 106