hbwhelp@micrel.com or (408) 955-1690 6.4 Reset Timing" />
參數(shù)資料
型號(hào): KSZ8993FL
廠商: Micrel Inc
文件頁(yè)數(shù): 98/100頁(yè)
文件大?。?/td> 0K
描述: IC CONV MED 10/100 SGL 128PQFP
標(biāo)準(zhǔn)包裝: 66
系列: *
類型: *
應(yīng)用: *
安裝類型: 表面貼裝
封裝/外殼: 128-BFQFP
供應(yīng)商設(shè)備封裝: 128-PQFP(14x20)
包裝: 托盤(pán)
產(chǎn)品目錄頁(yè)面: 1081 (CN2011-ZH PDF)
其它名稱: 576-1035
Micrel, Inc.
KS8993F/FL
June 2009
97
M9999-062509
hbwhelp@micrel.com or (408) 955-1690
6.4
Reset Timing
The KS8993F should be powered up with the VDD core voltages applied before the VDDIO voltage. In the worst case,
both VDD core and VDDIO voltages can be applied simultaneously.
Additional, reset timing requirement are summarized in the following figure and table.
Figure 24: Reset Timing
tsr
tcs
tch
trc
Supply
Voltage
RST_N
Strap-In
Value
Strap-In /
Output Pin
Table 23: Reset Timing Parameters
Parameter
Description
Min
Max
Units
tsr
Stable supply voltages to reset high
10
ms
tcs
Configuration setup time
50
ns
tch
Configuration hold time
50
ns
trc
Reset to Strap-In pin output
50
us
After the de-assertion of reset, it is recommended to wait a minimum of 100 us before starting programming on the
managed interface (I2C slave, SPI slave, SMI, MIIM).
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