參數(shù)資料
型號： KSZ8993MI
廠商： Micrel Inc
文件頁數(shù)： 86/86頁
文件大?。?/td> 0K
描述： IC SWITCH 10/100 W/TXRX 128PQFP
標(biāo)準(zhǔn)包裝： 66
系列： *
類型： *
應(yīng)用： *
安裝類型： 表面貼裝
封裝/外殼： 128-BFQFP
供應(yīng)商設(shè)備封裝： 128-PQFP（14x20）
包裝： 托盤
產(chǎn)品目錄頁面： 1081 (CN2011-ZH PDF)
其它名稱： 576-2124
KSZ8993MI-ND
Micrel, Inc.
KSZ8993M/ML
October 2008
9
M9999-020606
Package Information.............................................................................................................................86
List of Figures
Figure 1. Typical Straight Cable Connection .......................................................................................................................................25
Figure 2. Typical Crossover Cable Connection ...................................................................................................................................25
Figure 3. Auto Negotiation and Parallel Operation .............................................................................................................................26
Figure 4. Destination Address Lookup Flow Chart, Stage 1 ..............................................................................................................27
Figure 5. Destination Address Resolution Flow Chart, Stage 2 ........................................................................................................28
Figure 6. 802.1p Priority Field Format ..................................................................................................................................................37
Figure 7. KSZ8993M EEPROM Configuration Timing Diagram ..........................................................................................................38
Figure 8. SPI Write Data Cycle...............................................................................................................................................................42
Figure 9. SPI Read Data Cycle ...............................................................................................................................................................42
Figure 10. SPI Multiple Write..................................................................................................................................................................42
Figure 11. SPI Multiple Read..................................................................................................................................................................43
Figure 12. Loopback Path ......................................................................................................................................................................44
Figure 13. EEPROM Interface Input Timing Diagram ..........................................................................................................................76
Figure 14. EEPROM Interface Output Timing Diagram .......................................................................................................................76
Figure 15. SNI Input Timing Diagram....................................................................................................................................................77
Figure 16. SNI Output Timing Diagram.................................................................................................................................................77
Figure 17. MAC-Mode MII Timing – Data Received from MII ..............................................................................................................79
Figure 18. MAC-Mode MII Timing – Data Input to MII ..........................................................................................................................78
Figure 19. PHY-Mode MII Timing – Data Received from MII ...............................................................................................................79
Figure 20. PHY-Mode MII Timing – Data Input to MII ...........................................................................................................................79
Figure 21. SPI Input Timing....................................................................................................................................................................81
Figure 22. SPI Output Timing.................................................................................................................................................................82
Figure 23. Reset Timing .........................................................................................................................................................................83
128-Pin PQFP Package...........................................................................................................................................................................86
List of Tables
Table 1. FX and TX Mode Selection ......................................................................................................................................................22
Table 2. MDI/MDI-X Pin Definitions........................................................................................................................................................23
Table 3. MII Signals .................................................................................................................................................................................31
Table 4. SNI Signals ................................................................................................................................................................................32
Table 5. MII Management Interface Frame Format ..............................................................................................................................33
Table 6. Serial Management Interface (SMI) Frame Format................................................................................................................33
Table 7. Upstream Special Tagging Mode Format ..............................................................................................................................35
Table 8. STPID Egress Rules (Switch Port 3 to Processor)................................................................................................................35
Table 9. FID+DA Lookup in VLAN Mode ...............................................................................................................................................37
Table 10. FID+SA Lookup in VLAN Mode .............................................................................................................................................37
Table 11. KSZ8993M SPI Connections..................................................................................................................................................41
Table 12. Format of Static MAC Table (8 Entries)................................................................................................................................67
Table 13. Format of Static VLAN Table (16 Entries) ............................................................................................................................69
Table 14. Format of Dynamic MAC Address Table (1K Entries) ........................................................................................................69
Table 15. Format of “Per Port” MIB Counters......................................................................................................................................70
Table 16. Port 1s “Per Port” MIB Counters Indirect Memory Offsets................................................................................................71
Table 17. Port 1’s “Per Port” MIB Counters Indirect Memory Offsets...............................................................................................72
Table 18. Format of “All Port Dropped Packet” MIB Counters ..........................................................................................................72
Table 19. “All Port Dropped Packet” MIB Counters Indirect Memory Offsets .................................................................................72
Table 20. EEPROM Timing Parameters ................................................................................................................................................77
Table 21. SNI Timing Parameters ..........................................................................................................................................................78
Table 22. MAC-Mode MII Timing Parameters .......................................................................................................................................79
Table 23. PHY-Mode MII Timing Parameters ........................................................................................................................................80
Table 24. SPI Input Timing Parameters ................................................................................................................................................81
Table 25. SPI Output Timing Parameters .............................................................................................................................................82
Table 26. Reset Timing Parameters ......................................................................................................................................................83
Table 27. Transformer Selection Criteria..............................................................................................................................................85
Table 28. Qualified Single Port Magnetics ...........................................................................................................................................85
Table 29. Typical Reference Crystal Characteristics ..........................................................................................................................85
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參數(shù)描述
KSZ8993ML 功能描述:以太網(wǎng) IC 2+1 Port 10/100 Switch w/Tranceivers & Frame Buffers, 128-Ld PQFP(Lead Free) RoHS:否 制造商:Micrel 產(chǎn)品:Ethernet Switches 收發(fā)器數(shù)量:2 數(shù)據(jù)速率:10 Mb/s, 100 Mb/s 電源電壓-最大:1.25 V, 3.45 V 電源電壓-最小:1.15 V, 3.15 V 最大工作溫度:+ 85 C 封裝 / 箱體:QFN-64 封裝:Tray
KSZ8993ML-EVAL 功能描述:以太網(wǎng)開發(fā)工具 KSZ8993ML Evaluation Board RoHS:否 制造商:Micrel 產(chǎn)品:Evaluation Boards 類型:Ethernet Transceivers 工具用于評估:KSZ8873RLL 接口類型:RMII 工作電源電壓:
KSZ8993MLI 功能描述:以太網(wǎng) IC 2+1 Port 10/100 Switch w/Tranceivers & Frame Buffers, 128-Ld PQFP(Lead Free, I-Temp) RoHS:否 制造商:Micrel 產(chǎn)品:Ethernet Switches 收發(fā)器數(shù)量:2 數(shù)據(jù)速率:10 Mb/s, 100 Mb/s 電源電壓-最大:1.25 V, 3.45 V 電源電壓-最小:1.15 V, 3.15 V 最大工作溫度:+ 85 C 封裝 / 箱體:QFN-64 封裝:Tray
KSZ8995FQ 功能描述:以太網(wǎng) IC Integrated 5-Port Switch with Fiber on Port 3 & 4, Lead free RoHS:否 制造商:Micrel 產(chǎn)品:Ethernet Switches 收發(fā)器數(shù)量:2 數(shù)據(jù)速率:10 Mb/s, 100 Mb/s 電源電壓-最大:1.25 V, 3.45 V 電源電壓-最小:1.15 V, 3.15 V 最大工作溫度:+ 85 C 封裝 / 箱體:QFN-64 封裝:Tray
KSZ8995FQ-EVAL 功能描述:以太網(wǎng)開發(fā)工具 Integrated 5-Port Switch with Fiber on Port 3 & 4 Evaluation Board RoHS:否 制造商:Micrel 產(chǎn)品:Evaluation Boards 類型:Ethernet Transceivers 工具用于評估:KSZ8873RLL 接口類型:RMII 工作電源電壓:
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