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參數(shù)資料
| 型號： | L6260 |
| 廠商： | STMICROELECTRONICS |
| 元件分類： | 運動控制電子 |
| 英文描述： | DISK DRIVE MOTOR CONTROLLER, 1.5 A, PQFP64 |
| 封裝： | TQFP-64 |
| 文件頁數(shù)： | 4/30頁 |
| 文件大?。?/td> | 440K |
| 代理商： | L6260 |
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System Control Reg B (Reg 4)
Reg: 4
Name: System Control Register B
Type: Write only
BIT
LABEL
DESCRIPTION
@POR
0
FLLGAIN BIT 0
Frequency Locked Loop (FLL) gain control. A gain factor of 1 to 8
can be programmed, This register value varies the FLL gain by
changing the Integrator Current. Bit 0 is the LSB.
0
1
FLLGAIN BIT 1
0
2
FLLGAIN BIT 2
0
3
EXT_INT
External or internal spindle loop feedback. This bit is programmed
to 0 for BEMF feedback, 1 for external feedback. External
feedback is connected via the DTEST pin, which is configured as
an input in this mode.
0
4
CLK_PRESCALE
This selects a one bit pre-scaler for the internal clock, minimizing
the effect of differing fequencies on the FLL and logic counters.
Set to 1for 4-6MHz system clock, Set to 0 for 8-12MHz system
clock
0
5
SYNHALL
This selects the signal at the SYNTH_HALL pin.
When set to 0, Synth Hall pin will produce a once per BEMF
crossing signal (from BEMF comparitor). Setting the bit to 1,
Synth Hall pin will give a once per electrical cycle signal (from zero
crossing detector).
0
6
SFETGAIN
Selects the gain of the sense FET circuit of the spindle driver.
0 = Spindle is high transconductance loop gain, 1 = low gain
0
7
SLEW BIT 0
Slew rate control Bit 0 ( LSB)
0
8
SLEW BIT 1
Slew rate control Bit 1
0
9
SLEW BIT 2
Slew rate control Bit 2 (MSB)
0
10
SLEW BIT 3
Setting this bit to 1 selects an internal 250K slew rate resistor.
Setting it to 0 allows slew rate control by an external resistor.
0
11
MASK_PHASE
Selects between 7.5
° and 15° mask time (0=15°, 1=7.5°)
MOTOR PHASES
Below are the three possible waveforms
available from the SYNTH-HALL pin.
The desired waveform is selected via
"Synth Hall" bits in the System Control
Register B.
Once per "BEMF Crossing"
(Once per zero cross)
Once per "electrical cycle"
D94IN091
Figure 2: The following diagram explains bits 5 "SYNTH HALL" and the effect it has on the pin named
SYNTH_HALL
L6260
12/30
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