參數(shù)資料
型號(hào)： L6260
廠(chǎng)商： STMICROELECTRONICS
元件分類(lèi)： 運(yùn)動(dòng)控制電子
英文描述： DISK DRIVE MOTOR CONTROLLER, 1.5 A, PQFP64
封裝： TQFP-64
文件頁(yè)數(shù)： 5/30頁(yè)
文件大?。?/td> 440K
代理商： L6260
Frequency Locked Loop Coarse Counter (Reg 5)
This register contains the "coarse" FLL counter
value for the FLL. This register gives a worst case
resolution of 16
s with the worst case (i.e. slow-
est) 4MHz clock and has a valid range of 001 to
FFF hex.
Reg: 5
Name: FLL Coarse Counter Register
Type: Write Only
BIT
LABEL
DESCRIPTION
@POR
0
CLATCH BIT 0
FLL Coarse counter LSB
0
1
CLATCH BIT 1
0
2
CLATCH BIT 2
0
3
CLATCH BIT 3
0
4
CLATCH BIT 4
0
5
CLATCH BIT 5
0
6
CLATCH BIT 6
0
7
CLATCH BIT 7
0
8
CLATCH BIT 8
0
9
CLATCH BIT 9
0
10
CLATCH BIT 10
0
11
CLATCH BIT 11
FLL Coarse counter MSB
0
Frequency Locked Loop Fine Counter (Reg 6)
This register contains the "fine" counter value of
the FLL. The worst case resolution (i.e. with a
4MHz clock) is 1
s. It is important that the
most significant bit of this register must be a
zero when a write is made. Valid writes to this
register must be between 001 and 7FF hex.
Reg: 6
Name: FLL Fine Counter Register
Type: Write only.
BIT
LABEL
DESCRIPTION
@POR
0
FLATCH BIT 0
FLL Fine counter LSB
0
1
FLATCH BIT 1
0
2
FLATCH BIT 2
0
3
FLATCH BIT 3
0
4
FLATCH BIT 4
0
5
FLATCH BIT 5
0
6
FLATCH BIT 6
0
7
FLATCH BIT 7
0
8
FLATCH BIT 8
0
9
FLATCH BIT 9
0
10
FLATCH BIT 10
0
11
FLATCH BIT 11
FLL Fine counter MSB -NOTE: On a write to this register, this bit
must be zero.
0
L6260
13/30
相關(guān)PDF資料
PDF描述
L6561I 0.7 A POWER FACTOR CONTROLLER, PDIP8
L6561C 0.7 A POWER FACTOR CONTROLLER, PDIP8
L6561DI 0.7 A POWER FACTOR CONTROLLER, PDSO8
L6561DC 0.7 A POWER FACTOR CONTROLLER, PDSO8
L6562AD 0.8 A POWER FACTOR CONTROLLER, PDSO8
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