參數(shù)資料
型號(hào): LA4064ZC-75TN48E
廠商: Lattice Semiconductor Corporation
文件頁數(shù): 19/42頁
文件大?。?/td> 0K
描述: IC CPLD 64MACROCELLS 48TQFP
標(biāo)準(zhǔn)包裝: 250
系列: LA-ispMACH
可編程類型: 系統(tǒng)內(nèi)可編程
最大延遲時(shí)間 tpd(1): 7.5ns
電壓電源 - 內(nèi)部: 1.7 V ~ 1.9 V
宏單元數(shù): 64
輸入/輸出數(shù): 32
工作溫度: -40°C ~ 125°C
安裝類型: 表面貼裝
封裝/外殼: 48-TQFP
供應(yīng)商設(shè)備封裝: 48-TQFP(7x7)
包裝: 托盤
Lattice Semiconductor
LA-ispMACH 4000V/Z Automotive Family Data Sheet
26
Switching Test Conditions
Figure 12 shows the output test load that is used for AC testing. The specic values for resistance, capacitance,
voltage, and other test conditions are shown in Table 9.
Figure 12. Output Test Load, LVTTL and LVCMOS Standards
Table 9. Test Fixture Required Components
Test Condition
R1
R2
CL
1
Timing Ref.
VCCO
LVCMOS I/O, (L -> H, H -> L)
106Ω 106Ω
35pF
LVCMOS 3.3 = 1.5V
LVCMOS 3.3 = 3.0V
LVCMOS 2.5 = VCCO/2
LVCMOS 2.5 = 2.3V
LVCMOS 1.8 = VCCO/2
LVCMOS 1.8 = 1.65V
LVCMOS I/O (Z -> H)
106Ω
35pF
1.5V
3.0V
LVCMOS I/O (Z -> L)
106Ω∞
35pF
1.5V
3.0V
LVCMOS I/O (H -> Z)
106Ω
5pF
VOH - 0.3
3.0V
LVCMOS I/O (L -> Z)
106Ω∞
5pF
VOL + 0.3
3.0V
1. CL includes test xtures and probe capacitance.
VCCO
R1
R2
CL
DUT
Test
Point
0213A/ispm4k
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