參數(shù)資料
型號(hào): LAMXO640E-3TN100E
廠商: Lattice Semiconductor Corporation
文件頁數(shù): 29/77頁
文件大?。?/td> 0K
描述: IC FPGA 640LUTS 100TQFP
標(biāo)準(zhǔn)包裝: 90
系列: LA-MachXO
可編程類型: 系統(tǒng)內(nèi)可編程
最大延遲時(shí)間 tpd(1): 4.9ns
電壓電源 - 內(nèi)部: 1.14 V ~ 1.26 V
宏單元數(shù): 320
輸入/輸出數(shù): 74
工作溫度: -40°C ~ 125°C
安裝類型: 表面貼裝
封裝/外殼: 100-LQFP
供應(yīng)商設(shè)備封裝: 100-TQFP(14x14)
包裝: 托盤
3-9
DC and Switching Characteristics
Lattice Semiconductor
LA-MachXO Automotive Family Data Sheet
Table 3-1. LVDS DC Conditions
Over Recommended Operating Conditions
BLVDS
The LA-MachXO automotive family supports the BLVDS standard through emulation. The output is emulated using
complementary LVCMOS outputs in conjunction with a parallel external resistor across the driver outputs. The
input standard is supported by the LVDS differential input buffer on certain devices. BLVDS is intended for use
when multi-drop and bi-directional multi-point differential signaling is required. The scheme shown in Figure 3-2 is
one possible solution for bi-directional multi-point differential signals.
Figure 3-2. BLVDS Multi-point Output Example
Parameter
Description
Typical
Units
ZOUT
Output impedance
20
Ω
RS
Driver series resistor
294
Ω
RP
Driver parallel resistor
121
Ω
RT
Receiver termination
100
Ω
VOH
Output high voltage
1.43
V
VOL
Output low voltage
1.07
V
VOD
Output differential voltage
0.35
V
VCM
Output common mode voltage
1.25
V
ZBACK
Back impedance
100
Ω
IDC
DC output current
3.66
mA
Heavily loaded backplane, effective Zo ~ 45 to 90 ohms differential
2.5V
80
45-90 ohms
80
2.5V
+
-
. . .
+
-
. . .
+
-
+
-
16mA
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