參數(shù)資料
型號: LAN91C100FDTQFP
廠商: STANDARD MICROSYSTEMS CORP
元件分類: 微控制器/微處理器
英文描述: FEAST FAST ETHERNET CONTROLLER WITH FULL DUPLEX CAPABILITY
中文描述: 2 CHANNEL(S), 100M bps, LOCAL AREA NETWORK CONTROLLER, PQFP208
封裝: TQFP-208
文件頁數(shù): 19/79頁
文件大?。?/td> 585K
代理商: LAN91C100FDTQFP
FEAST Fast Ethernet Controller with Full Duplex Capability
SMSC DS – LAN91C100FD Rev. D
Page 19
Rev.
10/14/2002
PRELIMINARY
Chapter 5 Data Structures and Registers
5.1
Packet Format in Buffer Memory
The packet format in memory is similar for the Transmit and Receive areas. The first word is reserved for
the status word. The next word is used to specify the total number of bytes, and it is followed by the data
area. The data area holds the packet itself.
Figure 5.1
-
Data Packet Format
TRANSMIT PACKET
Written by CSMA upon transmit
completion (see Status Register)
RECEIVE PACKET
Written by CSMA upon receive
completion (see RX Frame
Status Word)
Written by CSMA
Written by CSMA
Written by CSMA; also has
odd/even bit
STATUS WORD
BYTE COUNT
DATA AREA
CONTROL BYTE
Written by CPU
Written/modified by CPU
Written by CPU to control
odd/even data bytes
BYTE COUNT - Divided by two, it defines the total number of words including the STATUS WORD, the
BYTE COUNT WORD, the DATA AREA and the CONTROL BYTE.
The receive byte count always appears as even; the ODDFRM bit of the receive status word indicates if the
low byte of the last word is relevant.
bit15
bit0
RAM OFFSET
(decimal)
0
2
4
2046 max
STATUS
WORD
reserved
BYTE
COUNT
DATA AREA
CONTROL BYTE
LAST DATA BYTE if odd
~~
~~
~~
~~
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