參數(shù)資料
型號: LAN91C100FDTQFP
廠商: STANDARD MICROSYSTEMS CORP
元件分類: 微控制器/微處理器
英文描述: FEAST FAST ETHERNET CONTROLLER WITH FULL DUPLEX CAPABILITY
中文描述: 2 CHANNEL(S), 100M bps, LOCAL AREA NETWORK CONTROLLER, PQFP208
封裝: TQFP-208
文件頁數(shù): 54/79頁
文件大?。?/td> 585K
代理商: LAN91C100FDTQFP
FEAST Fast Ethernet Controller with Full Duplex Capability
Rev.
10/14/2002
Page 54
SMSC DS – LAN91C100FD Rev. D
PRELIMINARY
On EEPROM write operations (after setting the STORE bit) the value of the GENERAL PURPOSE
REGISTER is written at the EEPROM word address defined by the POINTER REGISTER 6 least
significant bits.
RELOAD and STORE are set by the user to initiate read and write operations respectively. Polling the
value until read low is used to determine completion. When an EEPROM access is in progress the
STORE and RELOAD bits of CTR will readback as both bits high. No other bits of the LAN91C100FD
can be read or written until the EEPROM operation completes and both bits are clear. This
mechanism is also valid for reset initiated reloads.
Note:
If no EEPROM is connected to the LAN91C100FD, for example for some embedded applications, the
ENEEP pin should be grounded and no accesses to the EEPROM will be attempted. Configuration, Base,
and Individual Address assume their default values upon hardware reset and the CPU is responsible for
programming them for their final value.
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
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