參數(shù)資料
型號: LC5512MV-45Q208C
廠商: Lattice Semiconductor Corporation
文件頁數(shù): 63/99頁
文件大小: 0K
描述: IC XPLD 512MC 4.5NS 208PQFP
標(biāo)準(zhǔn)包裝: 24
系列: ispXPLD® 5000MV
可編程類型: 系統(tǒng)內(nèi)可編程
最大延遲時間 tpd(1): 4.5ns
電壓電源 - 內(nèi)部: 3 V ~ 3.6 V
邏輯元件/邏輯塊數(shù)目: 16
宏單元數(shù): 512
輸入/輸出數(shù): 149
工作溫度: 0°C ~ 90°C
安裝類型: 表面貼裝
封裝/外殼: 208-BFQFP
供應(yīng)商設(shè)備封裝: 208-PQFP(28x28)
包裝: 托盤
Lattice Semiconductor
ispXPLD 5000MX Family Data Sheet
62
3
61N
I14
I23
K23
I15
149
G13
D22
3
61P
I12
I22
K22
I13
150
G12
D21
3
62N
I10
I21
K21
I11
151
F14
J20
3
62P
I8/CLK_OUT1
I20
K20
I9
152
E15
J19
3
63N
I6
K31
I7
F12
E20
——
VCC
153
VCC
3
63P
I4
K30
L30
I5
F13
F20
3
64N
I2
K29
L28
I3
D16
H17
3
64P
I0
K28
L26
I1
D15
H18
GND (Bank 3)
GND (Bank 3) GND (Bank 3)
3
65N
J30
K27
J31
J18
——
VCCO3
——
VCCO3
3
65P
J28
K26
J29
H19
3
66N
J26
K25
J27
G20
3
66P
J24
K24
J25
G19
3
67N
J22
K23
J23
C22
3
67P
J20
K22
J21
C21
3
68N
J18
K21
J19
D20
3
68P
J16
K20
J17
C19
3
69N
J14
K19
J15
C16
F19
3
69P
J12
K18
J13
B16
E19
GND (Bank 3)
GND (Bank 3) GND (Bank 3)
3
70N
J10
K17
J11
C15
G18
——
VCCO3
——
VCCO3
3
70P
J8
K16
J9
B15
F18
3
71N
J6
K15
J7
E14
B20
3
71P
J4
K14
J5
D14
B19
3
72N
J2
K13
J3
E13
A20
3
72P
J0
K12
J1
A15
A19
3
73N
K30
I19
K19
K31
154
D12
D18
3
73P
K28
I18
K18
K29
155
B14
C18
3
74N
K26
I17
K17
K27
156
C13
G17
3
74P
K24
I16
K16
K25
157
A14
F16
3
75N
K22
I31
K31
K23
158
A13
E17
3
75P
K21
I30
K30
159
B13
D17
GND (Bank 3)
160
GND (Bank 3) GND (Bank 3)
3
76N
K20
K11
L21
D11
B18
——
VCCO3
161
VCCO3
3
76P
K18
K10
L20
K19
B12
A18
3
77N
K16
K9
L18
K17
C12
C17
3
77P
K14
K8
L16
K15
E11
B17
3
78N
K12
K7
L12
K13
C16
3
78P
K10
K6
L10
K11
B16
ispXPLD 5512MX Logic Signal Connections (Continued)
sysIO
Bank
LVDS
Pair
Primary Macrocell/
Function
Alternate Outputs
Alternate
Input
208 PQFP
Pin Number
256 fpBGA
Ball Number
484 fpBGA
Ball Number
Macrocell 1 Macrocell 2
SELECT
DEVICES
DISCONTINUED
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