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參數(shù)資料
| 型號： | LC72134M |
| 元件分類： | PLL合成/DDS/VCOs |
| 英文描述： | PLL FREQUENCY SYNTHESIZER, 160 MHz, PDSO24 |
| 封裝： | MFP-24 |
| 文件頁數(shù)： | 2/27頁 |
| 文件大小： | 463K |
| 代理商： | LC72134M |
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No. 5814-10/27
LC72134M
DI Control Data
No.
Control block/data
Function
Related data
1
Main PLL
programmable
divider data
P0 to P15
DVS, SNS
Specifies the divider for the main PLL programmable divider.
This is a binary value in which P15 is the MSB. The position of the LSB changes depending on DVS and
SNS.
(* : don’t care)
* LSB: When P4 is the LSB, P0 to P3 are ignored.
2
Main PLL reference
divider data
R0 to R3
XS
Selects the reference frequency for the main PLL
* PLL INHIBIT mode
In this mode, the main PLL programmable divider is stopped, the FMINa and AMIN pins are pulled down
to ground, and the main PLL charge pump output goes to the high-impedance state.
* Crystal oscillator stop mode
The crystal oscillator circuit is stopped.
Therefore applications must not select this mode while the sub PLL is operating.
Crystal oscillator element selection data
XS = 0: 4.5 MHz
XS = 1: 7.2 MHz
Note that 7.2 MHz is selected after a power on reset.
DVS
SNS
LSB
Set divisor (N)
Actual divisor
1
*
P0
272 to 65535
Twice the set value
0
1
P0
272 to 65535
The set value
0
P4
4 to 4095
The set value
R3
R2
R1
R0
Reference frequency
0
100
kHz
0
1
50
0
1
0
25
0
1
25
0
1
0
12.5
0
1
0
1
6.25
0
1
0
3.125
0
1
3.125
1
0
10
1
0
1
9
1
0
1
0
5
1
0
1
0
3
1
0
1
15
1
0
PLL INHIBIT + X’tal OSC STOP
1
PLL INHIBIT
These pins select the signal input to the main PLL programmable divider (FMINa or AMIN) and switch the
input frequency range.
* See the “Structure of the Programmable Divider” section for details.
DVS
SNS
Input pin
Frequency range accepted by the input pin
1
*
FMINa
10 to 160 MHz
0
1
AMIN
2 to 40 MHz
0
AMIN
0.5 to 10 MHz
(* : don’t care)
Continued on next page.
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PDF描述 |
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| LC72135M | PLL FREQUENCY SYNTHESIZER, 40 MHz, PDSO20 |
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| LC72140M | PLL FREQUENCY SYNTHESIZER, 160 MHz, PDSO24 |
| LC72140 | PLL FREQUENCY SYNTHESIZER, 160 MHz, PDIP24 |
| LC72146 | PLL FREQUENCY SYNTHESIZER, 40 MHz, PDIP24 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| LC72135M | 制造商:SANYO 制造商全稱:Sanyo Semicon Device 功能描述:PLL Frequency Synthesizer for Electronic Tuning |
| LC72135MA-AE | 功能描述:時鐘合成器/抖動清除器 RoHS:否 制造商:Skyworks Solutions, Inc. 輸出端數(shù)量: 輸出電平: 最大輸出頻率: 輸入電平: 最大輸入頻率:6.1 GHz 電源電壓-最大:3.3 V 電源電壓-最小:2.7 V 封裝 / 箱體:TSSOP-28 封裝:Reel |
| LC72135MA-Q-AE | 制造商:ON Semiconductor 功能描述:PLL FREQUENCY SYNTHESIZER - Tape and Reel 制造商:ON Semiconductor 功能描述:REEL / PLL FREQUENCY SYNTHESIZER |
| LC72135M-Q-TLM-E | 制造商:SANYO Semiconductor Co Ltd 功能描述: |
| LC72136 | 制造商:SANYO 制造商全稱:Sanyo Semicon Device 功能描述:PLL Frequency Synthesizer for Electronic Tuning |
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