參數資料
型號: LC72134M
元件分類: PLL合成/DDS/VCOs
英文描述: PLL FREQUENCY SYNTHESIZER, 160 MHz, PDSO24
封裝: MFP-24
文件頁數: 3/27頁
文件大小: 463K
代理商: LC72134M
No. 5814-11/27
LC72134M
No.
Control block/data
Function
Related data
3
4
IF counter control
data
CTE
GT0, GT1
IF counter selection
data
LCTS
L/I1
I/O port setup data
IOC2
IF counter measurement start command data
CTE = 1: Starts the counter
CTE = 0: Resets the counter
Determines the IF counter measurement time.
Specifies input or output for the shared function I/O pin (IO2).
Data = 0: Input port
Data = 1: Output port
5
Output port data
BO1 to BO4
IO2
Determines the output state of the BO1 through BO4 and IO2 output ports.
Data = 0: Open
Data = 1: Low level
The data is reset to 0, setting the pins to the open state, after a power on reset.
IOC2
Continued from preceding page.
IFS
GT1
GT0
Measurement time
Wait time
0
4 ms
3 to 4 ms
0
1
8
3 to 4
1
0
32
7 to 8
1
64
7 to 8
LCTS
L/I1
IFIN2/I1 pin
IFIN1 pin
0
I1 (Input port)
IFIN1 (IF counter 1)
0
1
OFF (Pulled down)
1
0
I1 (Input port)
OFF (Pulled down)
1
IFIN2 (IF counter 2)
* See the “Structure of the IF Counter” section for details.
Specifies the IF counter input pin (IFIN1 or IFIN2/I1).
LCTS = 0: IFIN1
LCTS = 1: IFIN2/I1
L/I1 = 0: I1 (Input port)
L/I1 = 1: IFIN2 (IF counter 2)
Continued on next page.
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參數描述
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