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參數(shù)資料
| 型號： | LC72714 |
| 廠商： | Sanyo Electric Co.,Ltd. |
| 英文描述： | Mobile FM Multiplex Broadcast IC with On-Chip VICS Decoder |
| 中文描述： | 多重移動調(diào)頻廣播集成電路片VICS解碼器 |
| 文件頁數(shù)： | 14/29頁 |
| 文件大小： | 232K |
| 代理商： | LC72714 |
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CPU Interface <CCB Mode>
CCB Format
Data is input and output using the CCB (Computer Control Bus) format, which is Sanyo’s audio IC serial bus format.
This IC uses an 8-bit address CCB with the address shown below. The CCB address is sent while CE is low, and the
CCB I/O mode is determined when CE is set high.
Data input (Register write)
Data is stored in an IC internal register. The CCB address #FA and 16 bits of data (DI0 to DI15) are input to the DI pin.
The bits are assigned as follows. Although DI12 to DI15 are unused data, arbitrary values must be provided to complete a
full 16 bits of data.
See the “Control Register” section earlier in this document for details on the register contents and addresses.
Details on writing to the layer 4 CRC check register are described later in this document. (The CCB address #FC is used
for this function.)
No. 6871-14/29
LC72714W
I/O mode
CCB address
Item
B0
B1
B2
B3
A0
A1
A2
A3
Input
0
1
0
1
1
1
1
1
16-bit control data input
Output
1
1
0
1
1
1
1
1
Data corresponding to the number of clock (CL) cycles is output
Input
0
0
1
1
1
1
1
1
Data input mode for the layer 4 CRC detection circuit (8-bit units)
Output
1
0
1
1
1
1
1
1
Register output only
DI0
DI1
DI2
DI3
DI4
DI5
DI6
DI7
DI8
DI9
DI10
DI11
DI12 to DI15
BIT0
BIT1
BIT2
BIT3
BIT4
BIT5
BIT6
BIT7
BIT0
BIT1
BIT2
BIT3
Unused data
(LSB)
Input data (8 bits)
(MSB)
Register address
Internal data latch operation
t
EL
t
EH
t
ES
t
CL
t
LC
t
CH
t
HD
t
SU
A3
DI15
DI14
DI13
DI2
DI1
DI0
A2
A1
A0
B3
B2
B1
B0
DI
CL
CE
Data Output (Post-correction data output)
The IC outputs packet data to which error correction processing has bee applied. The application inputs the CCB address
#FB to DI.
t
EL
t
DDO
t
ES
t
CL
t
CH
t
HD
t
SU
A3
DO287
DO286
DO285
DO2
DO1
DO0
A2
A1
A0
B3
B2
B1
B0
DI
DO
CL
CE
*
: The DO pin is normally left open.
Since the DO pin is an n-channel open-drain output, the data change time from a low-level
output to a high-level output differs due to the pull-up resistor.
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相關(guān)代理商/技術(shù)參數(shù) |
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| LC72714W | 制造商:SANYO 制造商全稱:Sanyo Semicon Device 功能描述:Mobile FM Multiplex Broadcast IC with On-Chip VICS Decoder |
| LC72715PW | 制造商:SANYO 制造商全稱:Sanyo Semicon Device 功能描述:CMOS IC Mobile FM Multiplex Broadcast IC with On-Chip VICS Decoder |
| LC72717PW | 制造商:SANYO 制造商全稱:Sanyo Semicon Device 功能描述:Mobile FM Multiplex Broadcast (DARC) Receiver IC |
| LC72720 | 制造商:SANYO 制造商全稱:Sanyo Semicon Device 功能描述:Single-Chip RDS Signal-Processing System LSI |
| LC72720M | 制造商:SANYO 制造商全稱:Sanyo Semicon Device 功能描述:Single-Chip RDS Signal-Processing System LSI |
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