參數(shù)資料
型號(hào)： LM2743
廠商： National Semiconductor Corporation
英文描述： N-Channel FET Synchronous Buck Regulator Controller for Conversion from 3.3V
中文描述： N溝道場(chǎng)效應(yīng)管同步降壓穩(wěn)壓控制器，用于從3.3V轉(zhuǎn)換
文件頁(yè)數(shù)： 13/23頁(yè)
文件大?。?/td> 653K
代理商： LM2743
Application Information
(Continued)
At an input voltage of 3V both, the high and low, side FETs
are driven with about 4.5V.
The decision on which configuration to use depends on the
desired output current and operating frequency. At high cur-
rents and low frequencies, configuration 3 (
Figure 11
) is
recommended. For low currents and high frequencies, con-
figuration 1 (
Figure 9
) may work well.
POWER GOOD SIGNAL
The power good signal is the OR-gated flag representing
over-voltage and under-voltage conditions. If the feedback
pin (FB) voltage is about 18% over its nominal value (V
TH-HI
= 0.710V) or falls about 30% below its nominal value
(V
= 0.434V) the power good flag goes low. At
about 118% of V
the converter turns off the high side gate
and turns on the low side gate. However, at about 70% of
V
the converter goes to maximum duty cycle and the high
and low sides are still switching. The power good flag will
return to logic high whenever the feedback pin voltage is
between 70% and 118% of 0.6V.
UVLO
The 2.76V turn-on threshold on V
CC
has a built in hysteresis
of 400mV. Therefore, if V
CC
drops below 2.42V, the chip
enters UVLO mode. UVLO consists of turning off the top and
bottom FETs, and remaining in that condition until V
CC
rises
above 2.76V. As with shutdown, the soft start capacitor is
discharged through a FET, ensuring that the next start-up will
be smooth.
CURRENT LIMIT
Current limit is realized by sensing the voltage across the
low side FET while it is on. The R
of the FET is a
known value, and the voltage across the FET can be found
from:
V
DS
= I
DS
* R
DS(ON)
The current limit is determined by an external resistor, R
,
connected between the switch node and the I
pin. A
constant current of 40μA is forced through R
, causing a
fixed voltage drop. This fixed voltage is compared against
V
and if the latter is higher, the current limit of the chip has
been reached. The R
CS
can be found by using the following:
where
datasheet (R
) and current limit (I
LIM
)
value is calculated from equation.
resistance
R
DS(ON)
is
taken
from
MOSFET’s
where: L is the inductance and F
OSC
is the PWM frequency.
Because current sensing is done across the low side FET, no
minimum high side on-time is necessary. In the current limit
mode the LM2743 will turn the high side off and the keep low
side on for a time as long as necessary. The chip also
discharges the soft start capacitor through a fixed 90μA
source. This way, smooth ramping up of the output voltage
as with a normal soft start is ensured. The output of the
LM2743 internal error amplifier is limited by the voltage on
the soft start capacitor. Hence, discharging the soft start
capacitor reduces the maximum duty cycle (D) of the con-
troller. During severe current limit, this reduction in duty cycle
will reduce the output voltage if the current limit conditions
last for an extended period of time.
UVF/OVF
The output under-voltage flag (UVF) and over-voltage flag
(OVF) mechanisms engage at about 70% and 118% of the
target output voltage, respectively. In the UVF case, the
LM2743 will turn off the high side switch and turn on the low
side switch and dischrage the soft start capacitor through the
MOSFET switch. However, in the OVF the converter goes to
maximum duty cycle and the high and low sides are still
switching. The chip remains in this state until the shutdown
pin has been pulled to a logic low and then released. The
UVF function is masked only during the initial charge of the
soft start capacitor, when voltage is first applied to the V
pin. The power good flag goes low during this time, giving a
logic-level warning signal.
SHUT DOWN
To assure proper IC start-up, shutdown pin (SD) should not
be left floating. For Normal Operation this pin should be
connected to V
CC
or other low voltage source (see Electrical
Characteristics table).
If the shutdown pin SD is pulled low, the LM2743 discharges
the soft start capacitor through a MOSFET switch. The high
and the low side switches are turned off. The LM2743 re-
mains in this state until SD is released.
DESIGN CONSIDERATIONS
The following is a design procedure for all the components
needed to create the Typical Application Circuit. The de-
signed 3.3V (V
) to 1.2V (V
) converter is capable of
delivering 4A with an efficiency of 89% at switching fre-
quency of 300kHz. The same procedures can be followed to
create many other designs with varies input and output
voltages, and load current.
20095219
FIGURE 11. Bootstrap Configuration 3
L
www.national.com
13
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LM2743EVAL/NOPB 功能描述:電源管理IC開(kāi)發(fā)工具 LM2743 EVAL BOARD RoHS:否 制造商:Maxim Integrated 產(chǎn)品:Evaluation Kits 類型:Battery Management 工具用于評(píng)估:MAX17710GB 輸入電壓: 輸出電壓:1.8 V
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LM2743MTC/NOPB 功能描述:DC/DC 開(kāi)關(guān)控制器 RoHS:否 制造商:Texas Instruments 輸入電壓:6 V to 100 V 開(kāi)關(guān)頻率: 輸出電壓:1.215 V to 80 V 輸出電流:3.5 A 輸出端數(shù)量:1 最大工作溫度:+ 125 C 安裝風(fēng)格: 封裝 / 箱體:CPAK
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