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參數(shù)資料
| 型號(hào)： | LMX2335 |
| 廠商： | National Semiconductor Corporation |
| 英文描述： | PLLatinum Dual Frequency Synthesizer for RF Personal Communications(PLLatinum技術(shù)用于射頻個(gè)人通訊的雙通道頻率合成器) |
| 中文描述： | PLLatinum雙頻率合成射頻個(gè)人通信（PLLatinum技術(shù)用于射頻個(gè)人通訊的雙通道頻率合成器） |
| 文件頁(yè)數(shù)： | 12/17頁(yè) |
| 文件大?。?/td> | 392K |
| 代理商： | LMX2335 |
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Typical Application Example
Application Information
A block diagram of the basic phase locked loop is shown in Figure 1
DS012332-10
Operational Notes:
*
VCO is assumed AC coupled.
**
R
increases impedance so that VCO output power is provided to the load rather than the PLL. Typical values are 10
to
200
depending on the VCO power level. f
IN
RF impedance ranges from 40
to 100
. f
IN
IF impedances are higher.
***
50
termination is often used on test boards to allow use of external reference oscillator. For most typical products a
CMOS clock is used and no terminating resistor is required. OSC
may be AC or DC coupled. AC coupling is recom-
mended because the input circuit provides its own bias. (See Figure below).
****
Adding RC filters to the V
CC
lines is recommended to reduce loop-to-loop noise coupling.
DS012332-11
Application Hints:
Proper use of grounds and bypass capacitors is essential to achieve a high level of performance. Crosstalk between pins can be reduced by careful board
layout.
This is an electrostatic sensitive device. It should be handled only at static free work stations.
DS012332-12
FIGURE 1. Conventional PLL Architecture
L
www.national.com
12
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| LMX2335 WAF | 制造商:Texas Instruments 功能描述: |
| LMX2335L | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:無(wú)線通訊 |
| LMX2335LM | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| LMX2335LSLB | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:PLLatinum⑩ Low Power Dual Frequency Synthesizer for RF Personal Communications |
| LMX2335LSLBX | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:FREQUENCY SYNTHESIZER|BICMOS|LLCC|16PIN|PLASTIC |
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