- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄384604 > LMX2335 (National Semiconductor Corporation) PLLatinum Dual Frequency Synthesizer for RF Personal Communications(PLLatinum技術(shù)用于射頻個人通訊的雙通道頻率合成器) PDF資料下載
參數(shù)資料
| 型號： | LMX2335 |
| 廠商： | National Semiconductor Corporation |
| 英文描述： | PLLatinum Dual Frequency Synthesizer for RF Personal Communications(PLLatinum技術(shù)用于射頻個人通訊的雙通道頻率合成器) |
| 中文描述： | PLLatinum雙頻率合成射頻個人通信（PLLatinum技術(shù)用于射頻個人通訊的雙通道頻率合成器） |
| 文件頁數(shù)： | 2/17頁 |
| 文件大?。?/td> | 392K |
| 代理商： | LMX2335 |
Connection Diagrams
Pin Descriptions
Pin No.
2335/37
1
Pin No.
2336
1
Pin
Name
V
CC
1
I/O
Description
Power supply voltage input for RF1 analog and RF1 digital circuits. Input may range
from 2.7V to 5.5V. V
CC
1 must equal V
CC
2. Bypass capacitors should be placed as
close as possible to this pin and be connected directly to the ground plane.
Power supply for RF1 charge pump. Must be
≥
V
CC
.
RF1 charge pump output. For connection to a loop filter for driving the input of an
external VCO.
LMX2335/37: Ground for RF1 analog and RF1 digital circuits. LMX2336: Ground for RF
digital circuitry.
First RF prescaler input. Small signal input from the VCO.
RF1 prescaler complementary input. A bypass capacitor should be placed as close as
possible to this pin and be connected directly to the ground plane. Capacitor is optional
with loss of some sensitivity.
Ground for RF1 analog circuitry.
Oscillator input. The input has a V
CC
/2 input threshold and can be driven from an
external CMOS or TTL logic gate.
Oscillator output.
Multiplexed output of the programmable or reference dividers, lock detect signals and
Fastlock mode. CMOS output (see Programmable Modes)
High impedance CMOS Clock input. Data for the various latches is clocked in on the
rising edge, into the 20-bit shift register.
Binary serial data input. Data entered MSB first. The last two bits are the control bits.
High impedance CMOS input.
Load enable high impedance CMOS input. When LE goes HIGH, data stored in the
shift registers is loaded into one of the 4 appropriate latches (control bit dependent).
Ground for RF2 analog circuitry.
RF2 prescaler complementary input. A bypass capacitor should be placed as close as
possible to this pin and be connected directly to the ground plane. Capacitor is optional
with loss of some sensitivity.
RF2 prescaler input. Small signal input from the VCO.
LMX2335/37: Ground for RF2 analog, RF2 digital, MICROWIRE
, F
o
LD and Oscillator
circuits. LMX2336: Ground for RF2 digital, MICROWIRE, F
o
LD and Oscillator circuits.
RF2 charge pump output. For connection to a loop filter for driving the input of an
external VCO.
Power supply for RF2 charge pump. Must be
≥
V
CC
.
2
3
2
3
V
p
1
D
o
1
O
4
4
GND
5
X
5
6
f
IN
1
f
IN
1
I
I
X
6
7
8
GND
OSC
in
I
7
8
9
OSC
out
F
o
LD
O
O
10
9
11
Clock
I
10
12
Data
I
11
13
LE
I
X
X
14
15
GND
f
IN
2
I
12
13
16
17
f
IN
2
GND
I
14
18
D
o
2
O
15
19
V
p
2
LMX2335/LMX2337
DS012332-2
Order Number LMX2335M/LMX2335TM or
LMX2337M/LMX2337TM
NS Package Number M16A and MTC16
LMX2336
DS012332-16
Order Number LMX2336TM
NS Package Number MTC20
L
www.national.com
2
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| LMX2337 | PLLatinum Dual Frequency Synthesizer for RF Personal Communications(PLLatinum技術(shù)用于射頻個人通訊的雙通道頻率合成器) |
| LMX2350 | PLLatinum Fractional Dual Low Power Frequency Synthesizer(PLLatinum技術(shù)低耗雙通道頻率合成器) |
| LMX2352 | PLLatinum Fractional Dual Low Power Frequency Synthesizer(PLLatinum技術(shù)低耗雙通道頻率合成器) |
| LMX2350TM | PLLatinum⑩ Fractional N RF / Integer N IF Dual Low Power Frequency Synthesizer |
| LMX2352TM | CAP,CER,DISC,RAD,100PF,10%,1KV |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| LMX2335 WAF | 制造商:Texas Instruments 功能描述: |
| LMX2335L | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:無線通訊 |
| LMX2335LM | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| LMX2335LSLB | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:PLLatinum⑩ Low Power Dual Frequency Synthesizer for RF Personal Communications |
| LMX2335LSLBX | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:FREQUENCY SYNTHESIZER|BICMOS|LLCC|16PIN|PLASTIC |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。