參數(shù)資料
型號: LPC1311FHN33,551
廠商: NXP Semiconductors
文件頁數(shù): 8/74頁
文件大?。?/td> 0K
描述: IC MCU 32BIT 8KB FLASH 33HVQFN
產(chǎn)品培訓(xùn)模塊: LPCXpresso
特色產(chǎn)品: LPC1300 Series Cortex-M3 MCUs
標(biāo)準(zhǔn)包裝: 260
系列: LPC13xx
核心處理器: ARM? Cortex?-M3
芯體尺寸: 32-位
速度: 72MHz
連通性: I²C,Microwire,SPI,SSI,UART/USART
外圍設(shè)備: 欠壓檢測/復(fù)位,POR,WDT
輸入/輸出數(shù): 28
程序存儲器容量: 8KB(8K x 8)
程序存儲器類型: 閃存
RAM 容量: 4K x 8
電壓 - 電源 (Vcc/Vdd): 2 V ~ 3.6 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 8x10b
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 33-VQFN 裸露焊盤,33-HVQFN,33-SQFN,33-DHVQFN
包裝: 托盤
配用: 622-1005-ND - USB IN-CIRCUIT PROG ARM7 LPC2K
其它名稱: 568-4915
935289654551
LPC1311_13_42_43
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2012. All rights reserved.
Product data sheet
Rev. 5 — 6 June 2012
16 of 74
NXP Semiconductors
LPC1311/13/42/43
32-bit ARM Cortex-M3 microcontroller
[1]
Pin state at reset for default function: I = Input; O = Output; PU = internal pull-up enabled (for VDD = 3.3 V, pin is pulled up to 2.6 V for
parts LPC1311/13/42/43 and pulled up to 3.3 V for parts LPC1311/01 and LPC1313/01); IA = inactive, no pull-up/down enabled.
F = floating; floating pins, if not used, should be tied to ground or power to minimize power consumption.
[2]
5 V tolerant pad. See Figure 37 for pad characteristics. RESET functionality is not available in Deep power-down mode. Use the
WAKEUP pin to reset the chip and wake up from Deep power-down mode. An external pull-up resistor is required on this pin for the
Deep power-down mode.
[3]
5 V tolerant pad providing digital I/O functions with configurable pull-up/pull-down resistors and configurable hysteresis (see Figure 36).
[4]
I2C-bus pads compliant with the I2C-bus specification for I2C standard mode and I2C Fast-mode Plus.
[5]
5 V tolerant pad providing digital I/O functions with configurable pull-up/pull-down resistors, configurable hysteresis, and analog input.
When configured as a ADC input, digital section of the pad is disabled, and the pin is not 5 V tolerant (see Figure 36).
[6]
Pad provides USB functions. It is designed in accordance with the USB specification, revision 2.0 (Full-speed and Low-speed mode
only). This pad is not 5 V tolerant.
[7]
When the system oscillator is not used, connect XTALIN and XTALOUT as follows: XTALIN can be left floating or can be grounded
(grounding is preferred to reduce susceptibility to noise). XTALOUT should be left floating.
PIO1_7/TXD/
CT32B0_MAT1
32[3] yes
I/O
I; PU
PIO1_7 — General purpose digital input/output pin.
O-
TXD — Transmitter output for UART.
O-
CT32B0_MAT1 — Match output 1 for 32-bit timer 0.
PIO1_8/
CT16B1_CAP0
yes
I/O
I; PU
PIO1_8 — General purpose digital input/output pin.
I-
CT16B1_CAP0 — Capture input 0 for 16-bit timer 1.
PIO1_9/
CT16B1_MAT0
12[3] yes
I/O
I; PU
PIO1_9 — General purpose digital input/output pin.
O-
CT16B1_MAT0 — Match output 0 for 16-bit timer 1.
PIO1_10/AD6/
CT16B1_MAT1
20[5] yes
I/O
I; PU
PIO1_10 — General purpose digital input/output pin.
I-
AD6 — A/D converter, input 6.
O-
CT16B1_MAT1 — Match output 1 for 16-bit timer 1.
PIO1_11/AD7
27[5] yes
I/O
I; PU
PIO1_11 — General purpose digital input/output pin.
I-
AD7 — A/D converter, input 7.
PIO2_0/DTR
yes
I/O
I; PU
PIO2_0 — General purpose digital input/output pin.
O-
DTR — Data Terminal Ready output for UART.
PIO3_2
28[3] yes
I/O
I; PU
PIO3_2 — General purpose digital input/output pin.
PIO3_4
13[3] no
I/O
I; PU
PIO3_4 — General purpose digital input/output pin (LPC1311/13 only).
PIO3_5
14[3] no
I/O
I; PU
PIO3_5 — General purpose digital input/output pin (LPC1311/13 only).
USB_DM
13[6] no
I/O
F
USB_DM — USB bidirectional D
line (LPC1342/43 only).
USB_DP
14[6] no
I/O
F
USB_DP — USB bidirectional D+ line (LPC1342/43 only).
VDD
6;
29
-
I
-
3.3 V supply voltage to the internal regulator, the external rail, and the
ADC. Also used as the ADC reference voltage.
XTALIN
-
I
-
Input to the oscillator circuit and internal clock generator circuits. Input
voltage must not exceed 1.8 V.
XTALOUT
-
O
-
Output from the oscillator amplifier.
VSS
33
-
Thermal pad. Connect to ground.
Table 4.
LPC1311/13/42/43 HVQFN33 pin description table …continued
Symbol
Pin
Start
logic
input
Type Reset
state
[1]
Description
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