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參數資料
| 型號： | LPC1751FBD80 |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | Cortex-M3 with 32 kB flash, 8 kB SRAM, USB 2.0 Device, CAN, 12-bit ADC |
| 中文描述： | 32-BIT, FLASH, 100 MHz, RISC MICROCONTROLLER, PQFP80 |
| 封裝： | 12 X 12 MM, 1.40 MM HEIGHT, PLASTIC, MS-026, SOT315-1, 80 PIN |
| 文件頁數： | 36/74頁 |
| 文件大?。?/td> | 1572K |
| 代理商： | LPC1751FBD80 |
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LPC1759_58_56_54_52_51
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2011. All rights reserved.
Product data sheet
Rev. 7 — 29 March 2011
36 of 74
NXP Semiconductors
LPC1759/58/56/54/52/51
32-bit ARM Cortex-M3 microcontroller
7.30.5
AHB multilayer matrix
The LPC1759/58/56/54/52/51 use an AHB multilayer matrix. This matrix connects the
instruction (I-code) and data (D-code) CPU buses of the ARM Cortex-M3 to the flash
memory, the main (32 kB) static RAM, and the Boot ROM. The GPDMA can also access
all of these memories. The peripheral DMA controllers, Ethernet (LPC1758 only) and
USB, can access all SRAM blocks. Additionally, the matrix connects the CPU system bus
and all of the DMA controllers to the various peripheral functions.
7.30.6
External interrupt inputs
The LPC1759/58/56/54/52/51 include up to 30 edge sensitive interrupt inputs combined
with one level sensitive external interrupt input as selectable pin function. The external
interrupt input can optionally be used to wake up the processor from Power-down mode.
7.30.7
Memory mapping control
The Cortex-M3 incorporates a mechanism that allows remapping the interrupt vector table
to alternate locations in the memory map. This is controlled via the Vector Table Offset
Register contained in the NVIC.
The vector table may be located anywhere within the bottom 1 GB of Cortex-M3 address
space. The vector table must be located on a 128 word (512 byte) boundary because the
NVIC on the LPC1759/58/56/54/52/51 is configured for 128 total interrupts.
7.31 Emulation and debugging
Debug and trace functions are integrated into the ARM Cortex-M3. Serial wire debug and
trace functions are supported in addition to a standard JTAG debug and parallel trace
functions. The ARM Cortex-M3 is configured to support up to eight breakpoints and four
watch points.
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相關代理商/技術參數 |
參數描述 |
|---|---|
| LPC1751FBD80,551 | 功能描述:ARM微控制器 - MCU ARM Cortex M3 Micro Controller RoHS:否 制造商:STMicroelectronics 核心:ARM Cortex M4F 處理器系列:STM32F373xx 數據總線寬度:32 bit 最大時鐘頻率:72 MHz 程序存儲器大小:256 KB 數據 RAM 大小:32 KB 片上 ADC:Yes 工作電源電壓:1.65 V to 3.6 V, 2 V to 3.6 V, 2.2 V to 3.6 V 工作溫度范圍:- 40 C to + 85 C 封裝 / 箱體:LQFP-48 安裝風格:SMD/SMT |
| LPC1751FBD80551 | 制造商:NXP Semiconductors 功能描述:IC 32BIT MCU 100MHZ LQFP-80 |
| LPC1752 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:32-bit ARM Cortex-M3 MCU; up to 512 kB flash and 64 kB SRAM with Ethernet, USB 2.0 Host/Device/OTG, CAN |
| LPC1752FBD80 | 制造商:NXP Semiconductors 功能描述:MCU 32BIT ARM CORTEX M3 80LQFP 制造商:NXP Semiconductors 功能描述:MCU, 32BIT, ARM CORTEX M3, 80LQFP 制造商:NXP Semiconductors 功能描述:IC, 32BIT MCU, ARM CORTEX, 100MHZ LQFP80; Controller Family/Series:(ARM Cortex); Core Size:32bit; No. of I/O's:52; Supply Voltage Min:2.4V; Supply Voltage Max:3.6V; Digital IC Case Style:LQFP; No. of Pins:80; Program Memory Size:64KB;RoHS Compliant: Yes |
| LPC1752FBD80,551 | 功能描述:ARM微控制器 - MCU ARM Cortex M3 Micro Controller RoHS:否 制造商:STMicroelectronics 核心:ARM Cortex M4F 處理器系列:STM32F373xx 數據總線寬度:32 bit 最大時鐘頻率:72 MHz 程序存儲器大小:256 KB 數據 RAM 大小:32 KB 片上 ADC:Yes 工作電源電壓:1.65 V to 3.6 V, 2 V to 3.6 V, 2.2 V to 3.6 V 工作溫度范圍:- 40 C to + 85 C 封裝 / 箱體:LQFP-48 安裝風格:SMD/SMT |
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