參數(shù)資料
型號(hào): LPC1751FBD80
廠商: NXP SEMICONDUCTORS
元件分類: 微控制器/微處理器
英文描述: Cortex-M3 with 32 kB flash, 8 kB SRAM, USB 2.0 Device, CAN, 12-bit ADC
中文描述: 32-BIT, FLASH, 100 MHz, RISC MICROCONTROLLER, PQFP80
封裝: 12 X 12 MM, 1.40 MM HEIGHT, PLASTIC, MS-026, SOT315-1, 80 PIN
文件頁數(shù): 70/74頁
文件大?。?/td> 1572K
代理商: LPC1751FBD80
LPC1759_58_56_54_52_51
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2011. All rights reserved.
Product data sheet
Rev. 7 — 29 March 2011
70 of 74
NXP Semiconductors
LPC1759/58/56/54/52/51
32-bit ARM Cortex-M3 microcontroller
17. Revision history
Table 24.
Document ID
Revision history
Release date
Data sheet status
Change
notice
-
Supersedes
LPC1759_58_56_54_52_51 v.7
Modifications:
20110329
Pin description of pins P0[29] and P0[30] updated in
Table note 4
of
Table 3
. Pins
are not 5 V tolerant.
Typical value for Parameter N
endu
added in
Table 8
.
Condition 3.0 V
V
DD(3V3)
3.6 V added in
Table 15
.
Typical values for parameters I
DD(REG)(3V3)
and I
BAT
with condition Deep
power-down mode corrected in
Table 6
and
Table note 9
,
Table note 10
, and
Table
note 11
updated.
For Deep power-down mode,
Figure 8
updated and
Figure 9
added.
20100825
Product data sheet
-
Section 7.30.2; BOD level corrected.
Added Section 10.2.
20100716
Product data sheet
-
20100126
Product data sheet
-
20091119
Product data sheet
-
20090211
Objective data sheet
-
20090115
Objective data sheet
-
Product data sheet
LPC1759_58_56_54_52_51 v.6
LPC1759_58_56_54_52_51 v.6
Modifications:
LPC1759_58_56_54_52_51 v.5
LPC1759_58_56_54_52_51 v.5
LPC1759_58_56_54_52_51 v.4
LPC1758_56_54_52_51 v.3
LPC1758_56_54_52_51 v.2
LPC1758_56_54_52_51 v.1
LPC1759_58_56_54_52_51 v.4
LPC1758_56_54_52_51 v.3
LPC1758_56_54_52_51 v.2
LPC1758_56_54_52_51 v.1
-
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