參數(shù)資料
型號(hào)： LPC2387FBD100
廠商： NXP Semiconductors N.V.
元件分類： 數(shù)學(xué)處理器
英文描述： Single-chip 16-bit-32-bit MCU; 512 kB flash with ISP-IAP, Ethernet, USB 2.0 device-host-OTG, CAN, and 10-bit ADC-DAC
封裝： LPC2387FBD100<SOT407-1 (LQFP100)|<<http://www.nxp.com/packages/SOT407-1.html<1<Always Pb-free,;
文件頁(yè)數(shù)： 25/64頁(yè)
文件大?。?/td> 447K
代理商： LPC2387FBD100
LPC2387
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2011. All rights reserved.
Product data sheet
Rev. 4 — 10 February 2011
25 of 64
NXP Semiconductors
LPC2387
Single-chip 16-bit/32-bit MCU
7.19 I
2
S-bus serial I/O controllers
The I
2
S-bus provides a standard communication interface for digital audio applications.
The
I
2
S-bus specification
defines a 3-wire serial bus using one data line, one clock line,
and one word select signal. The basic I
2
S connection has one master, which is always the
master, and one slave. The I
2
S interface on the LPC2387 provides a separate transmit
and receive channel, each of which can operate as either a master or a slave.
7.19.1
Features
The interface has separate input/output channels each of which can operate in master
or slave mode.
Capable of handling 8-bit, 16-bit, and 32-bit word sizes.
Mono and stereo audio data supported.
The sampling frequency can range from 16 kHz to 48 kHz (16, 22.05, 32, 44.1,
48) kHz.
Configurable word select period in master mode (separately for I
2
S input and output).
Two 8-word FIFO data buffers are provided, one for transmit and one for receive.
Generates interrupt requests when buffer levels cross a programmable boundary.
Two DMA requests, controlled by programmable buffer levels. These are connected
to the GPDMA block.
Controls include reset, stop and mute options separately for I
2
S input and I
2
S output.
7.20 General purpose 32-bit timers/external event counters
The LPC2387 includes four 32-bit Timer/Counters. The Timer/Counter is designed to
count cycles of the system derived clock or an externally-supplied clock. It can optionally
generate interrupts or perform other actions at specified timer values, based on four
match registers. The Timer/Counter also includes two capture inputs to trap the timer
value when an input signal transitions, optionally generating an interrupt.
7.20.1
Features
A 32-bit Timer/Counter with a programmable 32-bit prescaler.
Counter or Timer operation.
Two 32-bit capture channels per timer, that can take a snapshot of the timer value
when an input signal transitions. A capture event may also generate an interrupt.
Four 32-bit match registers that allow:
–
Continuous operation with optional interrupt generation on match.
–
Stop timer on match with optional interrupt generation.
–
Reset timer on match with optional interrupt generation.
Up to four external outputs corresponding to match registers, with the following
capabilities:
–
Set LOW on match.
–
Set HIGH on match.
–
Toggle on match.
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參數(shù)描述
LPC2387FBD100,551 功能描述:ARM微控制器 - MCU 16/32 bit micro RoHS:否 制造商:STMicroelectronics 核心:ARM Cortex M4F 處理器系列:STM32F373xx 數(shù)據(jù)總線寬度:32 bit 最大時(shí)鐘頻率:72 MHz 程序存儲(chǔ)器大小:256 KB 數(shù)據(jù) RAM 大小:32 KB 片上 ADC:Yes 工作電源電壓:1.65 V to 3.6 V, 2 V to 3.6 V, 2.2 V to 3.6 V 工作溫度范圍:- 40 C to + 85 C 封裝 / 箱體:LQFP-48 安裝風(fēng)格:SMD/SMT
LPC2387FBD100551 制造商:NXP Semiconductors 功能描述:IC 32BIT MCU 72MHZ LQFP-100
LPC2388 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Single-chip 16-bit/32-bit micro; 512 kB flash with ISP/IAP, Ethernet, USB 2.0 device/host/OTG, CAN, and 10-bit ADC/DAC
LPC2388FBD144 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Single-chip 16-bit/32-bit microcontroller; 512 kB flash with ISP/IAP, Ethernet, USB 2.0 device/host/OTG, CAN, and 10-bit ADC/DAC
LPC2388FBD144,551 功能描述:ARM微控制器 - MCU 16/32 bit micro RoHS:否 制造商:STMicroelectronics 核心:ARM Cortex M4F 處理器系列:STM32F373xx 數(shù)據(jù)總線寬度:32 bit 最大時(shí)鐘頻率:72 MHz 程序存儲(chǔ)器大小:256 KB 數(shù)據(jù) RAM 大小:32 KB 片上 ADC:Yes 工作電源電壓:1.65 V to 3.6 V, 2 V to 3.6 V, 2.2 V to 3.6 V 工作溫度范圍:- 40 C to + 85 C 封裝 / 箱體:LQFP-48 安裝風(fēng)格:SMD/SMT
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