參數資料
型號: LTC2153IUJ-14#TRPBF
廠商: Linear Technology
文件頁數: 7/24頁
文件大小: 0K
描述: IC ADC 14BIT DUAL 310MSPS 40QFN
標準包裝: 2,000
位數: 14
采樣率(每秒): 310M
數據接口: 并聯(lián),串行,SPI
轉換器數目: 1
功率耗散(最大): 479mW
電壓電源: 模擬和數字
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 40-WFQFN 裸露焊盤
供應商設備封裝: 40-QFN(6x6)
包裝: 帶卷 (TR)
輸入數目和類型: 1 個差分
配用: DC1371A-ND - BOARD USB DATA ACQUISITION HS
15
215314f
LTC2153-14
Figure 12. Functional Equivalent of Digital Output Randomizer
Figure 13. Decoding a Randomized Digital
Output Signal
applicaTions inForMaTion
DATA FORMAT
Table 1 shows the relationship between the analog input
voltage, the digital data output bits and the overflow bit.
By default the output data format is offset binary. The 2’s
complement format can be selected by serially program-
ming mode control register A4.
Table 1. Output Codes vs Input Voltage
AIN+ – AIN–
(1.32V Range)
OF
D13-D0
(OFFSET BINARY)
D13-D0
(2’s COMPLEMENT)
>0.66V
+0.66V
+0.6599194V
1
0
11 1111 1111 1111
11 1111 1111 1110
01 1111 1111 1111
01 1111 1111 1110
+0.0000806V
+0.000000V
–0.0000806V
–0.0001611V
0
10 0000 0000 0001
10 0000 0000 0000
01 1111 1111 1111
01 1111 1111 1110
00 0000 0000 0001
00 0000 0000 0000
11 1111 1111 1111
11 1111 1111 1110
–0.6599194V
–0.66V
< –0.66V
0
1
00 0000 0000 0001
00 0000 0000 0000
10 0000 0000 0001
10 0000 0000 0000
Digital Output Randomizer
Interference from the A/D digital outputs is sometimes
unavoidable.Digitalinterferencemaybefromcapacitiveor
inductive coupling or coupling through the ground plane.
Even a tiny coupling factor can cause unwanted tones
in the ADC output spectrum. By randomizing the digital
output before it is transmitted off chip, these unwanted
tones can be randomized which reduces the unwanted
tone amplitude.
The digital output is randomized by applying an exclu-
sive-OR logic operation between the LSB and all other
data output bits. To decode, the reverse operation is
applied—an exclusive-OR operation is applied between
the LSB and all other bits. The LSB, OF and CLKOUT out-
puts are not affected. The output randomizer is enabled
by serially programming mode control register A4.
CLKOUT
OF
D13/D0
D12/D0
D1/D0
D0
215314 F12
OF
D13
D12
D1
D0
RANDOMIZER
ON
D13
FPGA
PC BOARD
D12
D1
D0
215314 F13
D0
D1/D0
D12/D0
D13/D0
OF
CLKOUT
LTC2153-14
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