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參數(shù)資料
| 型號： | LTC2410CGN |
| 廠商： | LINEAR TECHNOLOGY CORP |
| 元件分類： | ADC |
| 英文描述： | 20-Bit Universal Bus Driver With 3-State Outputs 56-SSOP -40 to 85 |
| 中文描述： | 1-CH 24-BIT DELTA-SIGMA ADC, SERIAL ACCESS, PDSO16 |
| 封裝： | 0.150 INCH, PLASTIC, SSOP-16 |
| 文件頁數(shù)： | 26/44頁 |
| 文件大?。?/td> | 778K |
| 代理商： | LTC2410CGN |
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LTC2410
26
APPLICATIU
W
U
U
ity. Typical measured performance curves for output data
rates up to 100 readings per second are shown in Fig-
ures27, 28, 29, 30, 31, 32, 33 and 34. In order to obtain
the highest possible level of accuracy from this converter
at output data rates above 20 readings per second, the
user is advised to maximize the power supply voltage used
and to limit the maximum ambient operating temperature.
In certain circumstances, a reduction of the differential
reference voltage may be beneficial.
Input Bandwidth
The combined effect of the internal Sinc
4
digital filter and
of the analog and digital autocalibration circuits deter-
mines the LTC2410 input bandwidth. When the internal
oscillator is used with the notch set at 60Hz (F
O
= LOW),
the 3dB input bandwidth is 3.63Hz. When the internal
oscillator is used with the notch set at 50Hz (F
O
= HIGH),
the 3dB input bandwidth is 3.02Hz. If an external conver-
sion clock generator of frequency f
EOSC
is connected to the
F
O
pin, the 3dB input bandwidth is 0.236 10
–6
f
EOSC
.
Due to the complex filtering and calibration algorithms
utilized, the converter input bandwidth is not modeled very
accurately by a first order filter with the pole located at the
3dB frequency. When the internal oscillator is used, the
shape of the LTC2410 input bandwidth is shown in Fig-
ure35 for F
O
= LOW and F
O
= HIGH. When an external
oscillator of frequency f
EOSC
is used, the shape of the
LTC2410 input bandwidth can be derived from Figure35,
F
O
= LOW curve in which the horizontal axis is scaled by
f
EOSC
/153600.
The conversion noise (800nV
RMS
typical for V
REF
= 5V)
can be modeled by a white noise source connected to a
noise free converter. The noise spectral density is
62.75nV
√
Hz for an infinite bandwidth source and
76.8nV
√
Hz for a single 0.5MHz pole source. From these
numbers, it is clear that particular attention must be given
to the design of external amplification circuits. Such
circuits face the simultaneous requirements of very low
bandwidth (just a few Hz) in order to reduce the output
referred noise and relatively high bandwidth (at least
500kHz) necessary to drive the input switched-capacitor
network. A possible solution is a high gain, low bandwidth
amplifier stage followed by a high bandwidth unity-gain
buffer.
Figure 27. Offset Error vs Output Data Rate and Temperature
Figure 28. +FS Error vs Output Data Rate and Temperature
Figure 29. –FS Error vs Output Data Rate and Temperature
OUTPUT DATA RATE (READINGS/SEC)
0
10 20 30 40 50 60 70 80 90 100
O
R
)
2410 F27
500
450
400
350
300
250
200
150
100
50
0
T
A
= 85
°
C
V
CC
= 5V
REF
= 5V
REF
–
= GND
V
INCM
= 2.5V
V
IN
F
O
= EXTERNAL OSCILLATOR
T
A
= 25
°
C
OUTPUT DATA RATE (READINGS/SEC)
0
10 20 30 40 50 60 70 80 90 100
+
R
)
2410 F28
7000
6000
5000
4000
3000
2000
1000
0
T
A
= 85
°
C
V
CC
= 5V
REF
= 5V
REF
–
= GND
IN
+
= 3.75V
IN
–
= 1.25V
F
O
= EXTERNAL OSCILLATOR
T
A
= 25
°
C
OUTPUT DATA RATE (READINGS/SEC)
0
10 20 30 40 50 60 70 80 90 100
–
R
)
2410 F29
0
–1000
–2000
–3000
–4000
–5000
–6000
–7000
T
A
= 85
°
C
V
CC
= 5V
REF
+
= 5V
REF
–
= GND
IN
+
= 1.25V
IN
–
= 3.75V
F
O
= EXTERNAL OSCILLATOR
T
A
= 25
°
C
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