- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄377769 > LTC2414CGN (LINEAR TECHNOLOGY CORP) 8-/16-Channel 24-Bit No Latency TM ADCs PDF資料下載
參數(shù)資料
| 型號： | LTC2414CGN |
| 廠商： | LINEAR TECHNOLOGY CORP |
| 元件分類： | ADC |
| 英文描述： | 8-/16-Channel 24-Bit No Latency TM ADCs |
| 中文描述： | 8-CH 24-BIT DELTA-SIGMA ADC, SERIAL ACCESS, PDSO28 |
| 封裝： | 0.150 INCH, PLASTIC, SSOP-28 |
| 文件頁數(shù)： | 22/48頁 |
| 文件大?。?/td> | 775K |
| 代理商： | LTC2414CGN |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁當前第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁
LTC2414/LTC2418
22
241418fa
When testing EOC, if the conversion is complete (EOC =0),
the device will exit the low power mode during the EOC
test. In order to allow the device to return to the low power
sleep state, CS must be pulled HIGH before the first rising
edge of SCK. In the internal SCK timing mode, SCK goes
HIGH and the device begins outputting data at time t
EOCtest
after the falling edge of CS (if EOC = 0) or t
EOCtest
after EOC
goes LOW (if CS is LOW during the falling edge of EOC).
The value of t
EOCtest
is 23
μ
s if the device is using its internal
oscillator (F
O
= logic LOW or HIGH). If F
O
is driven by an
external oscillator of frequency f
EOSC
, then t
EOCtest
is
3.6/f
EOSC
. If CS is pulled HIGH before time t
EOCtest
, the
device returns to the sleep state and the conversion result
is held in the internal static shift register.
If CS remains LOW longer than t
EOCtest
, the first rising
edge of SCK will occur and the conversion result is serially
shifted out of the SDO pin. The data I/O cycle concludes
after the 32nd rising edge. The input data is then shifted in
via the SDI pin on the rising edge of SCK (including the first
rising edge) and the output data is shifted out of the SDO
pin on each falling edge of SCK. The internally generated
serial clock is output to the SCK pin. This signal may be
used to shift the conversion result into external circuitry.
EOC can be latched on the first rising edge of SCK and the
last bit of the conversion result on the 32nd rising edge of
SCK. After the 32nd rising edge, SDO goes HIGH (EOC =
1), SCK stays HIGH and a new conversion starts.
Typically, CS remains LOW during the data output state.
However, the data output state may be aborted by pulling
CS HIGH anytime between the first and 32nd rising edge
of SCK, see Figure 9. On the rising edge of CS, the device
aborts the data output state and immediately initiates a
new conversion. If the device has not finished loading the
last input bit A0 of SDI by the time CS is pulled HIGH, the
address information is discarded and the previous ad-
dress is still kept. This is useful for systems not requiring
all 32 bits of output data, aborting an invalid conversion
cycle, or synchronizing the start of a conversion. If CS is
pulled HIGH while the converter is driving SCK LOW, the
internal pull-up is not available to restore SCK to a logic
HIGH state. This will cause the device to exit the internal
serial clock mode on the next falling edge of CS. This can
be avoided by adding an external 10k pull-up resistor to
the SCK pin or by never pulling CS HIGH when SCK is LOW.
APPLICATIOU
W
U
U
Figure 8. Internal Serial Clock, Single Cycle Operation
(1)
(0)
EN
SGL
A2
A1
A0
ODD/
SIGN
SDI
DON’T CARE
DON’T CARE
SDO
SCK
(INTERNAL)
CS
MSB
SIG
BIT 0
LSB
PARITY
BIT 6
TEST EOC
BIT 27
BIT 26
BIT 25
BIT 24
BIT 28
BIT 29
BIT 30
EOC
BIT 31
SLEEP
SLEEP
DATA OUTPUT
CONVERSION
CONVERSION
241418 F08
<t
EOCtest
Hi-Z
Hi-Z
Hi-Z
Hi-Z
TEST EOC
V
CC
F
O
REF
+
REF
–
CH0
CH7
CH8
CH15
COM
SCK
SDI
SDO
CS
GND
9
19
11
12
21
28
1
8
10
18
17
15
16
20
REFERENCE
VOLTAGE
0.1V TO V
CC
ANALOG
INPUTS
= 50Hz REJECTION
= EXTERNAL OSCILLATOR
= 60Hz REJECTION
V
CC
1
μ
F
2.7V TO 5.5V
LTC2414/
LTC2418
4-WIRE
SPI INTERFACE
V
CC
10k
相關PDF資料 |
PDF描述 |
|---|---|
| LTC2414IGN | 8-/16-Channel 24-Bit No Latency TM ADCs |
| LTC2418CGN | 8-/16-Channel 24-Bit No Latency TM ADCs |
| LTC2418IGN | 8-/16-Channel 24-Bit No Latency TM ADCs |
| LTC2415-1CGN | 24-Bit No Latency ADCs with Differential Input and Differential Reference |
| LTC2415-1IGN | 24-Bit No Latency ADCs with Differential Input and Differential Reference |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| LTC2414CGN#PBF | 功能描述:IC ADC 8CH 24BIT DIFFINPUT28SSOP RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模數(shù)轉換器 系列:- 標準包裝:1 系列:microPOWER™ 位數(shù):8 采樣率（每秒）:1M 數(shù)據(jù)接口:串行，SPI? 轉換器數(shù)目:1 功率耗散（最大）:- 電壓電源:模擬和數(shù)字 工作溫度:-40°C ~ 125°C 安裝類型:表面貼裝 封裝/外殼:24-VFQFN 裸露焊盤 供應商設備封裝:24-VQFN 裸露焊盤（4x4） 包裝:Digi-Reel® 輸入數(shù)目和類型:8 個單端，單極 產(chǎn)品目錄頁面:892 (CN2011-ZH PDF) 其它名稱:296-25851-6 |
| LTC2414CGN#PBF | 制造商:Linear Technology 功能描述:IC ADC 24BIT SSOP-28 |
| LTC2414CGN#TR | 功能描述:IC ADC 8CH 24BIT DIFFINPUT28SSOP RoHS:否 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模數(shù)轉換器 系列:- 標準包裝:1,000 系列:- 位數(shù):16 采樣率（每秒）:45k 數(shù)據(jù)接口:串行 轉換器數(shù)目:2 功率耗散（最大）:315mW 電壓電源:模擬和數(shù)字 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:28-SOIC（0.295"，7.50mm 寬） 供應商設備封裝:28-SOIC W 包裝:帶卷 (TR) 輸入數(shù)目和類型:2 個單端，單極 |
| LTC2414CGN#TRPBF | 功能描述:IC ADC 8CH 24BIT DIFFINPUT28SSOP RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模數(shù)轉換器 系列:- 標準包裝:1,000 系列:- 位數(shù):16 采樣率（每秒）:45k 數(shù)據(jù)接口:串行 轉換器數(shù)目:2 功率耗散（最大）:315mW 電壓電源:模擬和數(shù)字 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:28-SOIC（0.295"，7.50mm 寬） 供應商設備封裝:28-SOIC W 包裝:帶卷 (TR) 輸入數(shù)目和類型:2 個單端，單極 |
| LTC2414CGNPBF | 制造商:Linear Technology 功能描述:ADC,LTC2414C 24bit D-S 8 ch SPI SSOP |
發(fā)布緊急采購，3分鐘左右您將得到回復。