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| 型號(hào)： | LTC2414CGN |
| 廠商： | LINEAR TECHNOLOGY CORP |
| 元件分類： | ADC |
| 英文描述： | 8-/16-Channel 24-Bit No Latency TM ADCs |
| 中文描述： | 8-CH 24-BIT DELTA-SIGMA ADC, SERIAL ACCESS, PDSO28 |
| 封裝： | 0.150 INCH, PLASTIC, SSOP-28 |
| 文件頁(yè)數(shù)： | 26/48頁(yè) |
| 文件大?。?/td> | 775K |
| 代理商： | LTC2414CGN |
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LTC2414/LTC2418
26
241418fa
Input Current
If complete settling occurs on the input, conversion re-
sults will be unaffected by the dynamic input current. An
incomplete settling of the input signal sampling process
may result in gain and offset errors, but it will not degrade
the INL performance of the converter. Figure 11 shows the
mathematical expressions for the average bias currents
flowing through the IN
+
and IN
–
pins as a result of the
sampling charge transfers when integrated over a sub-
stantial time period (longer than 64 internal clock cycles).
The effect of this input dynamic current can be analyzed
using the test circuit of Figure 12. The C
PAR
capacitor
includes the LTC2414/LTC2418 pin capacitance (5pF typi-
cal) plus the capacitance of the test fixture used to obtain
the results shown in Figures 13 and 14. A careful imple-
mentation can bring the total input capacitance (C
IN
+
C
PAR
) closer to 5pF thus achieving better performance
than the one predicted by Figures 13 and 14. For simplic-
ity, two distinct situations can be considered.
For relatively small values of input capacitance (C
IN
<
0.01
μ
F), the voltage on the sampling capacitor settles
almost completely and relatively large values for the
APPLICATIOU
W
U
U
source impedance result in only small errors. Such values
for C
IN
will deteriorate the converter offset and gain
performance without significant benefits of signal filtering
and the user is advised to avoid them. Nevertheless, when
small values of C
IN
are unavoidably present as parasitics
of input multiplexers, wires, connectors or sensors, the
LTC2414/LTC2418 can maintain its exceptional accuracy
while operating with relative large values of source resis-
tance as shown in Figures 13 and 14. These measured
results may be slightly different from the first order
approximation suggested earlier because they include the
effect of the actual second order input network together
with the nonlinear settling process of the input amplifiers.
For small C
IN
values, the settling on IN
+
and IN
–
occurs
almost independently and there is little benefit in trying to
match the source impedance for the two pins.
Larger values of input capacitors (C
IN
> 0.01
μ
F) may be
required in certain configurations for antialiasing or gen-
eral input signal filtering. Such capacitors will average the
input sampling charge and the external source resistance
will see a quasi constant input differential impedance.
When F
O
= LOW (internal oscillator and 60Hz notch), the
V
REF
+
V
IN
+
V
CC
R
SW
(TYP)
20k
I
LEAK
I
LEAK
V
CC
V
CC
I
LEAK
I
LEAK
R
SW
(TYP)
20k
C
18pF
(TYP)
R
SW
(TYP)
20k
I
LEAK
I
IN
+
V
IN
–
I
IN
–
I
REF
+
I
REF
–
2414/18 F11
I
LEAK
V
CC
I
LEAK
I
LEAK
SWITCHING FREQUENCY
f
SW
= 76800Hz INTERNAL OSCILLATOR (F
O
= LOW OR HIGH)
f
SW
= 0.5 f
EOSC
EXTERNAL OSCILLATOR
V
REF
–
R
SW
(TYP)
20k
Figure 11. LTC2414/LTC2418 Equivalent Analog Input Circuit
I IN
(
(
(
(
V
V
0 5
.
V
R
I IN
V
V
0 5
.
V
R
0 5
.
I REF
V
V
V
R
V
V
V
R
2
I REF
V
V
R
V
V
R
where
V
REF
AVG
IN
INCM
REFCM
EQ
AVG
)
)
:
REF
=
IN
INCM
REFCM
EQ
AVG
REF
INCM
0 5
.
REFCM
EQ
IN
REF
EQ
AVG
REF
INCM
REFCM
EQ
IN
REF
EQ
+
+
)
)
=
+
=
+
=
+
=
+
+
1 5
.
1 5
.
2
.
.
.
/
REF
+
V
REF
REF
V
IN
IN
+
V
IN
IN
R
M
INTERNAL OSCILLATOR
Hz Notch F
60
LOW
R
M
INTERNAL OSCILLATOR
)
Hz Notch F
50
HIGH
R
f
EXTERNAL OSCILLATOR
REFCM
IN
INCM
EQ
O
EQ
O
EQ
EOSC
=
+
2
=
=
2
=
=
(
(
)
=
=
)
=
(
+
+
3 61
4 32
0 555 10
12
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