參數(shù)資料
型號: LTC2439-1
廠商: Linear Technology Corporation
元件分類: ADC
英文描述: 8-/16-Channel 16-Bit No Latency Delta-Sigma ADC
中文描述: 8-/16-Channel 16位無延遲增量累加模數(shù)轉換器
文件頁數(shù): 9/28頁
文件大?。?/td> 288K
代理商: LTC2439-1
LTC2439-1
9
24391f
Conversion Clock
A major advantage the delta-sigma converter offers over
conventional type converters is an on-chip digital filter
(commonly implemented as a Sinc or Comb filter). For
high resolution, low frequency applications, this filter is
typically designed to reject line frequencies of 50Hz and
60Hz plus their harmonics. The filter rejection perfor-
mance is directly related to the accuracy of the converter
system clock. The LTC2439-1 incorporates a highly accu-
rate on-chip oscillator. This eliminates the need for exter-
nal frequency setting components such as crystals or
oscillators. Clocked by the on-chip oscillator, the
LTC2436-1 achieves a minimum of 87dB rejection over
the range 49Hz to 61.2Hz.
Ease of Use
The LTC2439-1 data output has no latency, filter settling
delay or redundant data associated with the conversion
cycle. There is a one-to-one correspondence between the
conversion and the output data. Therefore, multiplexing
multiple analog voltages is easy.
The LTC2439-1 performs offset and full-scale calibrations
in every conversion cycle. This calibration is transparent to
the user and has no effect on the cyclic operation described
above. The advantage of continuous calibration is extreme
stability of offset and full-scale readings with respect to time,
supply voltage change and temperature drift.
Power-Up Sequence
The LTC2439-1 automatically enters an internal reset state
when the power supply voltage V
CC
drops below approxi-
mately 2V. This feature guarantees the integrity of the
conversion result and of the serial interface mode selec-
tion. (See the 3-wire I/O sections in the Serial Interface
Timing Modes section.)
When the V
CC
voltage rises above this critical threshold,
the converter creates an internal power-on-reset (POR)
signal with a typical duration of 1ms. The POR signal
clears all internal registers. Following the POR signal,
the LTC2439-1 starts a normal conversion cycle and
follows the succession of states described above. The first
conversion result following POR is accurate within the
specifications of the device if the power supply voltage is
restored within the operating range (2.7V to 5.5V) before
the end of the POR time interval.
Reference Voltage Range
The LTC2439-1 accepts a truly differential external refer-
ence voltage. The absolute/common mode voltage speci-
fication for the REF
+
and REF
pins covers the entire range
from GND to V
CC
. For correct converter operation, the
REF
+
pin must always be more positive than the REF
pin.
The LTC2439-1 can accept a differential reference voltage
from 0.1V to V
CC
. The converter output noise is deter-
mined by the thermal noise of the front-end circuits, and
as such, its value in microvolts is nearly constant with
reference voltage. A decrease in reference voltage will
significantly improve the converter’s effective resolution,
since the thermal noise (1
μ
V) is well below the quantiza-
tion level of the device (75.6
μ
V for a 5V reference). At the
minimum reference (100mV) the thermal noise
remains constant at 1
μ
V RMS (or 6
μ
V
P-P
), while the
quantization is reduced to 1.5
μ
V per LSB. As a result,
lowering the reference improves the effective resolution
for low level input voltages.
Input Voltage Range
The two selected pins are labeled IN
+
and IN
(see Table 1).
Once selected (either differential or single-ended multiplex-
ing mode), the analog input is differential with a common
mode range for the IN
+
and IN
input pins extending from
GND – 0.3V to V
CC
+ 0.3V. Outside these limits, the ESD
protection devices begin to turn on and the errors due to
input leakage current increase rapidly. Within these limits,
the LTC2439-1 converts the bipolar differential input sig-
nal, V
IN
= IN
+
– IN
, from –FS = –0.5 V
REF
to +FS = 0.5
V
REF
where V
REF
= REF
+
– REF
. Outside this range the
converter indicates the overrange or the underrange con-
dition using distinct output codes.
Input signals applied to IN
+
and IN
pins may extend
300mV below ground or above V
CC
. In order to limit any
fault current, resistors of up to 5k may be added in series
with the IN
+
or IN
pins without affecting the performance
of the device. In the physical layout, it is important to
APPLICATIOU
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相關PDF資料
PDF描述
LTC2439-1IGN 8-/16-Channel 16-Bit No Latency Delta-Sigma ADC
LTC2440CGN 24-Bit High Speed Differential delta-sigma ADC with Selectable Speed/Resolution
LTC2440IGN 24-Bit High Speed Differential delta-sigma ADC with Selectable Speed/Resolution
LTC2444 24-Bit High Speed 8-/16-Channel ADCs with Selectable Speed/Resolution
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