0.5 VREF. Outside this input range the converter produ" />
參數(shù)資料
型號(hào)： LTC2484IDD#TRPBF
廠商： Linear Technology
文件頁(yè)數(shù)： 3/42頁(yè)
文件大小： 0K
描述： IC ADC 24BIT 10-DFN
標(biāo)準(zhǔn)包裝： 2,500
位數(shù)： 24
采樣率（每秒）： 6.8
數(shù)據(jù)接口： MICROWIRE?，串行，SPI?
轉(zhuǎn)換器數(shù)目： 1
功率耗散（最大）： 480µW
電壓電源： 單電源
工作溫度： -40°C ~ 85°C
安裝類型： 表面貼裝
封裝/外殼： 10-WFDFN 裸露焊盤
供應(yīng)商設(shè)備封裝： 10-DFN（3x3）
包裝： 帶卷 (TR)
輸入數(shù)目和類型： 1 個(gè)差分，雙極
配用： DC939A-ND - BOARD DELTA SIGMA ADC LTC2484
LTC2484
11
2484fd
PIN FUNCTIONS
0.5 VREF. Outside this input range the converter produces
unique overrange and underrange output codes.
CS (Pin 6): Active LOW Chip Select. A LOW on this pin
enables the digital input/output and wakes up the ADC.
Following each conversion the ADC automatically enters
the sleep mode and remains in this low power state as
long as CS is HIGH. A LOW-to-HIGH transition on CS
during the Data Output transfer aborts the data transfer
and starts a new conversion.
SDO (Pin 7): Three-State Digital Output. During the data
output period, this pin is used as the serial data output.
When the chip select, CS, is HIGH (CS = VCC), the SDO
pin is in a high impedance state. During the conversion
and sleep periods, this pin is used as the conversion
status output. The conversion status can be observed by
pulling CS LOW.
GND (Pin 8): Ground. Shared pin for analog ground, digital
ground and reference ground. Should be connected directly
to a ground plane through a minimum impedance.
SCK (Pin 9): Bidirectional Digital Clock Pin. In internal
serial clock operation mode, SCK is used as the digital
output for the internal serial interface clock during the
data input/output period. In external serial clock operation
mode, SCK is used as the digital input for the external se-
rial interface clock during the data output period. A weak
internal pull-up is automatically activated in Internal serial
clock operation mode. The serial clock operation mode
is determined by the logic level applied to the SCK pin at
power up or during the most recent falling edge of CS.
fO (Pin 10): Frequency Control Pin. Digital input that
controls the conversion clock. When fO is connected to
GND the converter uses its internal oscillator running at
307.2kHz. The conversion clock may also be overridden by
driving the fO pin with an external clock in order to change
the output rate or the digital lter rejection null.
Exposed Pad (Pin 11): This pin is ground and should be
soldered to the PCB, GND plane. For prototyping purposes
this pin may remain oating.
FUNCTIONAL BLOCK DIAGRAM
1
9
4
5
8
7
6
3RD ORDER
ADC
REF+
IN+
3
2
VREF
VCC
GND
IN–
REF–
SERIAL
INTERFACE
TEMP
SENSOR
MUX
SDI
CS
2484 FB
SCK
SD0
AUTOCALIBRATION
AND CONTROL
INTERNAL
OSCILLATOR
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