參數(shù)資料
型號(hào)： LXT332
廠(chǎng)商： Digital Data Communications GmbH
英文描述： 3941
中文描述： 雙T1/E1線(xiàn)路接口單元與水晶無(wú)衰減
文件頁(yè)數(shù)： 7/32頁(yè)
文件大?。?/td> 777K
代理商： LXT332
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TVCC1
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+ 5 volt power supply input for the port 1 transmit driver.
TVCC1 must
not vary from TVCC0 or VCC by more than ± 0.3 V.
Ground.
Ground return for power supply TVCC1.
+5 VDC power supply
input for all circuits, except the transmit drivers.
Jitter Attenuation Select.
Selects jitter attenuation for both ports. When
JASEL = 1, JA circuits are placed in the receive paths. When JASEL = 0, JA
circuits are placed in the transmit paths. When JASEL is clocked with
MCLK, the JA circuit is disabled.
Violation insert, Clock, or QRSS.
Function (Violation insert, Clock, or
QRSS) is determined by the VCQE pin. Provides Violation Insertion, High
Frequency Clock or QRSS Generation functions for Port 1. Refer to VCQ0
signal description for details.
Serial Port Enable.
SPE must be clocked with MCLK to enable Host Mode
control through the serial port.
Violation - Clock - QRSS Enable.
When set High, enables the Bipolar
Violation Insert functions of VCQ0 and VCQ1 pins. When set Low, enables
the High Frequency Clock functions of VCQ0 and VCQ1. When clocked
with MCLK, enables the QRSS functions of VCQ0 and VCQ1, and enables
the QRSS Generate and Detect function of PD0 and PD1 pins.
Serial Data Output.
If CLKE is High, SDO is valid on the rising edge of
SCLK. If CLKE is Low, SDO is valid on the falling edge of SCLK.
Receive Clock - Port 1.
This clock is recovered from the input signal.
Under Loss of Signal (LOS) conditions, this output is derived from MCLK.
Receive Positive and Negative Data - Port 1.
In the Bipolar I/O mode,
these pins are the data outputs from port 1. A signal on RPOS corresponds to
receipt of a positive pulse on RTIP/RRING. A signal on RNEG corresponds
to receipt of a negative pulse on RTIP/RRING. RNEG/RPOS outputs are
Non-Return-to-Zero (NRZ). CLKE determines the clock edge at which
these outputs are stable and valid.
Transmit Positive and Negative Data - Port 1.
In the Bipolar I/O mode,
these pins are TPOS and TNEG, the positive and negative sides of a bipolar
input pair for port 1. Data to be transmitted onto the twisted-pair line is input
at these pins. However, when TRSTE is clocked by MCLK, the LXT332
switches to a unipolar mode. Unipolar mode pin functions are described sep-
arately.
Transmit Clock - Port 1.
1.544 MHz for T1, 2.048 MHz for E1. The trans-
mit data inputs are sampled on the falling edge of TCLK.
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Transmit Data - Port 0.
In the Unipolar mode, the data to be transmitted
onto the twisted-pair line from port 0 is input at this pin.
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