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參數(shù)資料
| 型號： | M25PE16-VMW6TP |
| 廠商： | 意法半導(dǎo)體 |
| 元件分類： | DRAM |
| 英文描述： | 4 Mbit Uniform Sector, Serial Flash Memory |
| 中文描述： | 4兆位統(tǒng)一部門，串行閃存 |
| 文件頁數(shù)： | 32/56頁 |
| 文件大?。?/td> | 334K |
| 代理商： | M25PE16-VMW6TP |
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Instructions
M25PE16
32/56
6.9
Page Write (PW)
The Page Write (PW) instruction allows Bytes to be written in the memory. Before it can be
accepted, a Write Enable (WREN) instruction must previously have been executed. After the
Write Enable (WREN) instruction has been decoded, the device sets the Write Enable Latch
(WEL).
The Page Write (PW) instruction is entered by driving Chip Select (S) Low, followed by the
instruction code, three address Bytes and at least one data Byte on Serial Data Input (D).
The rest of the page remains unchanged if no power failure occurs during this write cycle.
The Page Write (PW) instruction performs a page erase cycle even if only one Byte is
updated.
If the 8 least significant address bits (A7-A0) are not all zero, all transmitted data exceeding
the addressed page boundary roll over, and are written from the start address of the same
page (the one whose 8 least significant address bits (A7-A0) are all zero). Chip Select (S)
must be driven Low for the entire duration of the sequence.
The instruction sequence is shown in
Figure 14
.
If more than 256 Bytes are sent to the device, previously latched data are discarded and the
last 256 data Bytes are guaranteed to be written correctly within the same page. If less than
256 Data Bytes are sent to device, they are correctly written at the requested addresses
without having any effects on the other Bytes of the same page.
For optimized timings, it is recommended to use the Page Write (PW) instruction to write all
consecutive targeted Bytes in a single sequence versus using several Page Write (PW)
sequences with each containing only a few Bytes
Chip Select (S) must be driven High after the eighth bit of the last data Byte has been
latched in, otherwise the Page Write (PW) instruction is not executed.
As soon as Chip Select (S) is driven High, the self-timed Page Write cycle (whose duration
is t
PW
) is initiated. While the Page Write cycle is in progress, the Status Register may be
read to check the value of the Write In Progress (WIP) bit. The Write In Progress (WIP) bit is
1 during the self-timed Page Write cycle, and is 0 when it is completed. At some unspecified
time before the cycle is complete, the Write Enable Latch (WEL) bit is reset.
A Page Write (PW) instruction applied to a page that is Hardware or Software Protected is
not executed.
Any Page Write (PW) instruction, while an Erase, Program or Write cycle is in progress, is
rejected without having any effects on the cycle that is in progress.
If Reset (RESET) is driven Low while a Page Write (PW) cycle is in progress, the Page Write
cycle is interrupted and the programmed data may be corrupted (see
Table 12: Device
status after a RESET Low pulse
). On RESET going Low, the device enters the Reset mode
and a time of t
RHSL
is then required before the device can be re-selected by driving Chip
Select (S) Low. For the value of t
RHSL
see
Table 20: Timings after a RESET Low pulse
in
Section 11: DC and AC parameters
.
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| M25PE40 | 4 Mbit Uniform Sector, Serial Flash Memory |
| M25PE40VMN6G | 4 Mbit Uniform Sector, Serial Flash Memory |
| M25PE40VMN6P | 4 Mbit Uniform Sector, Serial Flash Memory |
| M25PE40VMN6TG | 4 Mbit Uniform Sector, Serial Flash Memory |
| M25PE40VMN6TP | 4 Mbit Uniform Sector, Serial Flash Memory |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| M25PE20 | 制造商:NUMONYX 制造商全稱:Numonyx B.V 功能描述:1 and 2 Mbit, page-erasable serial Flash memories with byte alterability, 75 MHz SPI bus, standard pinout |
| M25PE20_07 | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:1 and 2 Mbit, low voltage, Page-Erasable Serial Flash memories with Byte-Alterability, 50 MHz SPI bus, standard pinout |
| M25PE20-V6D11 | 制造商:Micron Technology Inc 功能描述:SERIAL NOR 制造商:Micron Technology Inc 功能描述:SERIAL NOR - Gel-pak, waffle pack, wafer, diced wafer on film |
| M25PE20-VMN6G | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:1 and 2 Mbit, low voltage, Page-Erasable Serial Flash memories with Byte-Alterability, 50 MHz SPI bus, standard pinout |
| M25PE20-VMN6P | 功能描述:閃存 1 AND 2 MBIT LV SERIAL FL RoHS:否 制造商:ON Semiconductor 數(shù)據(jù)總線寬度:1 bit 存儲類型:Flash 存儲容量:2 MB 結(jié)構(gòu):256 K x 8 定時(shí)類型: 接口類型:SPI 訪問時(shí)間: 電源電壓-最大:3.6 V 電源電壓-最小:2.3 V 最大工作電流:15 mA 工作溫度:- 40 C to + 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體: 封裝:Reel |
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