參數(shù)資料
型號: M30833FJFP
元件分類: 微控制器/微處理器
英文描述: 32-BIT, FLASH, 30 MHz, MICROCONTROLLER, PQFP100
封裝: PLASTIC, QFP-100
文件頁數(shù): 159/159頁
文件大?。?/td> 3896K
代理商: M30833FJFP
Skip condition
Number of
cycles
Number of
words
Instruction
code
D9
D0
Flag CY
2
16
Skip condition
Number of
cycles
Number of
words
Instruction
code
D9
D0
Flag CY
2
16
Skip condition
Number of
cycles
Number of
words
Instruction
code
D9
D0
Flag CY
2
16
Skip condition
Number of
cycles
Number of
words
Instruction
code
D9
D0
Flag CY
2
16
Rev.3.00
2004.08.06
page 97 of 155
REJ03B0010-0300Z
4584 Group
PRELIMINARY
Notice: This is not a final specification.
Some parametric limits are subject to change.
POF (Power OFf)
0000000010
002
11
––
Grouping:
Other operation
Description: Puts the system in RAM back-up state by
executing the POF instruction after execut-
ing the EPOF instruction.
Note:
If the EPOF instruction is not executed before
executing this instruction, this instruction is
equivalent to the NOP instruction.
Operation:
Transition to RAM back-up mode
RAR (Rotate Accumulator Right)
0000011101
01D
1
0/1
Grouping:
Arithmetic operation
Description: Rotates 1 bit of the contents of register A in-
cluding the contents of carry flag CY to the
right.
Operation:
→ CY → A3A2A1A0
RB j (Reset Bit)
00010011j
j
04
11
Grouping:
Bit operation
Description: Clears (0) the contents of bit j (bit specified
by the value j in the immediate field) of
M(DP).
Operation:
(Mj(DP))
← 0
j = 0 to 3
C
+j
MACHINE INSTRUCTIONS (INDEX BY ALPHABET) (continued)
0000011001
019
11
Grouping:
Arithmetic operation
Description: Takes the OR operation between the con-
tents of register A and the contents of
M(DP), and stores the result in register A.
Operation:
(A)
← (A) OR (M(DP))
OR (logical OR between accumulator and memory)
相關PDF資料
PDF描述
M30833MJFP 32-BIT, MROM, 30 MHz, MICROCONTROLLER, PQFP100
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相關代理商/技術參數(shù)
參數(shù)描述
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