參數(shù)資料
型號(hào): M30833FJFP
元件分類: 微控制器/微處理器
英文描述: 32-BIT, FLASH, 30 MHz, MICROCONTROLLER, PQFP100
封裝: PLASTIC, QFP-100
文件頁(yè)數(shù): 83/159頁(yè)
文件大?。?/td> 3896K
代理商: M30833FJFP
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Under
development
Preliminary Specifications REV.1.02
Specifications in this manual are tentative and subject to change.
Mitsubishi Microcomputers
M32C/83 group
SINGLE-CHIP 16/32-BIT CMOS MICROCOMPUTER
Overview
2
Performance Outline
Tables 1.1.1 and 1.1.2 list performance outline of the M32C/83 group.
Table 1.1.1. M32C/83 Group Performance (144-Pin Package)
Item
Performance
CPU
Basic instructions
108 instructions
Shortest instruction execution time
33 ns (f(XIN)=30MHz)
Operation mode
Single-chip, memory expansion and microprocessor modes
Memory space
16M bytes
Memory capacity
See Table 1.1.3.
Peripheral I/O port
124 pins (P0 to P15, P85 is used as an input port)
function Multifunction timer
Output
16 bits x 5 channels (TA0, TA1, TA2, TA3, TA4)
Input
16 bits x 6 channels (TB0, TB1, TB2, TB3, TB4, TB5)
Three-phase motor control output
1 circuit
Intelligent I/O
4 groups
Time measurement function
12 channels (group 0: 8 channels, group1: 4 channels)
Waveform generation function
28 channels (group 0: 4 channels, group1,2,3: 8 channels each)
Bit modulation PWM
16 channels (group 2,3: 8 channels each)
Real-time port
16 channels (group 2,3: 8 channels each)
Communication function
Clock synchronous serial I/O, UART: 2 channels (group 0 and 1)
HDLC data processing : 2 channels (group 0 and 1)
Clock synchronous variable length serial I/O:1 channel (group 2)
IE bus1 : 1 channel (group 2)
8-bit or 16-bit clock synchronous serial I/O : 1 channel (group 3)
Serial I/O
5 channels (UART0 to UART4)
Clock synchronous,Clock asynchronous,IE Bus1, I2C Bus 2
CAN module
1 channel, supporting CAN 2.0B specification
A-D converter
10-bit A-D x 2 circuits (standard 18 inputs, maximum 34 inputs)
D-A converter
8-bit D-A x 2 circuits
DMAC
4 channels
DMAC II
Activated by all relocatable vector interrupt factors
Immediate transfer, arithmetic transfer and chain transfer functions
DRAMC
_______
CAS-before-RAS refresh, self-refresh, EDO, FP
CRC calculation circuit
CRC-CCITT
X-Y converter
16 bits X 16 bits
Watchdog timer
15 bits x 1 channel (with prescaler)
Interrupt
42 internal and 8 external sources, 5 software sources, interrupt priority level 7
Clock generation circuit
4 circuits
Main clock generation circuit
Sub clock generation circuit
The above circuits include an internal feedback resistance and
external ceramic resonator/crystal oscillator.
Ring oscillator (for the main clock oscillator stop detect function)
PLL frequency synthesizer
Electric
Supply voltage
4.2 to 5.5V (f(XIN)=30MHz, VDC on)
charact-
3.0 to 5.5V (f(XIN)=20MHz, VDC on)
eristics
3.0 to 3.6V (f(XIN)=20MHz, VDC off)
Power consumption
38mA (f(XIN)=30MHz with no wait,Vcc=5V)
26mA (f(XIN)=20MHz with no wait,Vcc=3.3V)
I/O characteristics
I/O withstand voltage Vcc
I/O current
5mA
Operating ambient temperature
–20 to 85oC, –40 to 85oC
Device configuration
CMOS high performance silicon gate
Package
144-pin plastic mold QFP
Notes :
1. IE Bus is a trademark of NEC Corporation.
2. I2C Bus is a trademark of Koninklijke Philips Electronics N. V.
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