參數(shù)資料
型號(hào): M30833FJFP
元件分類: 微控制器/微處理器
英文描述: 32-BIT, FLASH, 30 MHz, MICROCONTROLLER, PQFP100
封裝: PLASTIC, QFP-100
文件頁(yè)數(shù): 95/159頁(yè)
文件大?。?/td> 3896K
代理商: M30833FJFP
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Rev.3.00
2004.08.06
page 38 of 155
REJ03B0010-0300Z
4584 Group
PRELIMINARY
Notice: This is not a final specification.
Some parametric limits are subject to change.
(4) Timer 2 (interrupt function)
Timer 2 is an 8-bit binary down counter with the timer 2 reload reg-
ister (R2). Data can be set simultaneously in timer 2 and the reload
register (R2) with the T2AB instruction. Data can be read from
timer 2 with the TAB2 instruction. Stop counting and then execute
the T2AB or TAB2 instruction to read or set timer 2 data.
Timer 2 starts counting after the following process;
set data in timer 2,
select the count source with the bits 0 and 1 of register W2, and
set the bit 2 of register W2 to “1.”
When a value set in reload register R2 is n, timer 2 divides the
count source signal by n + 1 (n = 0 to 255).
Once count is started, when timer 2 underflows (the next count
pulse is input after the contents of timer 2 becomes “0”), the timer
2 interrupt request flag (T2F) is set to “1,” new data is loaded from
reload register R2, and count continues (auto-reload function).
Timer 2 underflow signal divided by 2 can be output from CNTR0
pin by setting bit 3 of register W2 to “1” and setting bit 0 of register
W6 to “1”.
(5) Timer 3 (interrupt function)
Timer 3 is an 8-bit binary down counter with the timer 3 reload reg-
ister (R3). Data can be set simultaneously in timer 3 and the reload
register (R3) with the T3AB instruction. Data can be written to re-
load register (R3) with the TR3AB instruction. Data can be read
from timer 3 with the TAB3 instruction.
Stop counting and then execute the T3AB or TAB3 instruction to
read or set timer 3 data.
When executing the TR3AB instruction to set data to reload regis-
ter R3 while timer 3 is operating, avoid a timing when timer 3
underflows.
Timer 3 starts counting after the following process;
set data in timer 3
set count source by bits 0 and 1 of register W3, and
set the bit 2 of register W3 to “1.”
When a value set in reload register R3 is n, timer 3 divides the
count source signal by n + 1 (n = 0 to 255).
Once count is started, when timer 3 underflows (the next count
pulse is input after the contents of timer 3 becomes “0”), the timer
3 interrupt request flag (T3F) is set to “1,” new data is loaded from
reload register R3, and count continues (auto-reload function).
INT1 pin input can be used as the start trigger for timer 3 count op-
eration by setting the bit 0 of register I2 to “1.”
Also, in this time, the auto-stop function by timer 3 underflow can
be performed by setting the bit 3 of register W3 to “1.”
(6) Timer 4 (interrupt function)
Timer 4 is an 8-bit binary down counter with two timer 4 reload reg-
isters (R4L, R4H). Data can be set simultaneously in timer 4 and
the reload register R4L with the T4AB instruction. Data can be set
in the reload register R4H with the T4HAB instruction. The contents
of reload register R4L set with the T4AB instruction can be set to
timer 4 again with the T4R4L instruction. Data can be read from
timer 4 with the TAB4 instruction.
Stop counting and then execute the T4AB or TAB4 instruction to
read or set timer 4 data.
When executing the T4HAB instruction to set data to reload regis-
ter R4H while timer 4 is operating, avoid a timing when timer 4
underflows.
Timer 4 starts counting after the following process;
set data in timer 4
set count source by bit 0 of register W4, and
set the bit 1 of register W4 to “1.”
When a value set in reload register R4L is n, timer 4 divides the
count source signal by n + 1 (n = 0 to 255).
Once count is started, when timer 4 underflows (the next count
pulse is input after the contents of timer 4 becomes “0”), the timer
4 interrupt request flag (T4F) is set to “1,” new data is loaded from
reload register R4L, and count continues (auto-reload function).
The PWM signal generated by timer 4 can be output from CNTR1
pin by setting bit 3 of the timer control register W4 to “1”.
Timer 4 can control the PWM output to CNTR1 pin with timer 3 by
setting bit 1 of the timer control register W6 to “1”.
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