參數(shù)資料
型號(hào): M34282
廠商: Mitsubishi Electric Corporation
英文描述: Single Chip 4 Bits CMOS Microcomputer(4位單片機(jī))
中文描述: 4位單片微機(jī)的CMOS(4位單片機(jī))
文件頁數(shù): 20/70頁
文件大?。?/td> 560K
代理商: M34282
MITSUBISHI
ELECTRIC
PRELIMINARY
Notice: This is not a final specification.
Some parametric limits are subject to change.
20
MITSUBISHI MICROCOMPUTERS
4282 Group
SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER
Remarks
Only key-on wakeup function of the port whose pull-down transistor is
turned ON by register PU1 is valid.
Only key-on wakeup function of the port whose pull-down transistor is
turned ON by register PU0 is valid.
Key-on wakeup function is always valid.
Return source
Ports D
4
D
7
Ports E
0
, E
1
, G
Ports E
2
Return condition
Return by an external
H
level
input.
Return by an external
H
level
input.
Return by an external
H
level
input.
Table 8 Return source and return condition
(5) Pull-down control register
Registers PU0 and PU1 are 4-bit registers and control the
ON/OFF of pull-down transistor and key-on wakeup function
for ports E
0
, E
1
, G and ports D
4
D
7
.
Table 9 Pull-down control registers
PU0
3
PU0
2
PU0
1
PU0
0
Pull-down transistor OFF, key-on wakeup invalid
Pull-down transistor ON, key-on wakeup valid
Pull-down transistor OFF, key-on wakeup invalid
Pull-down transistor ON, key-on wakeup valid
Pull-down transistor OFF, key-on wakeup invalid
Pull-down transistor ON, key-on wakeup valid
Pull-down transistor OFF, key-on wakeup invalid
Pull-down transistor ON, key-on wakeup valid
Ports G
2
, G
3
pull-down transistor control
bit
Ports G
0
, G
1
pull-down transistor control
bit
Port E
1
pull-down transistor control bit
Port E
0
pull-down transistor control bit
Pull-down control register PU0
at reset : 0000
2
at RAM back-up : state retained
W
0
1
0
1
0
1
0
1
Note:
W
represents write enabled.
Set the contents of register PU0 or PU1 through register A
with the TPU0A or TPU1A instruction, respectively.
(4) Return signal
An external wakeup signal is used to return from the RAM
back-up mode. Table 8 shows the return condition for each
return source.
PU1
3
PU1
2
PU1
1
PU1
0
Pull-down transistor OFF, key-on wakeup invalid
Pull-down transistor ON, key-on wakeup valid
Pull-down transistor OFF, key-on wakeup invalid
Pull-down transistor ON, key-on wakeup valid
Pull-down transistor OFF, key-on wakeup invalid
Pull-down transistor ON, key-on wakeup valid
Pull-down transistor OFF, key-on wakeup invalid
Pull-down transistor ON, key-on wakeup valid
Port D
7
pull-down transistor control bit
Port D
6
pull-down transistor control bit
Port D
5
pull-down transistor control bit
Port D
4
pull-down transistor control bit
Pull-down control register PU1
at reset : 0000
2
at RAM back-up : state retained
W
0
1
0
1
0
1
0
1
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