參數(shù)資料
型號: M34282
廠商: Mitsubishi Electric Corporation
英文描述: Single Chip 4 Bits CMOS Microcomputer(4位單片機)
中文描述: 4位單片微機的CMOS(4位單片機)
文件頁數(shù): 43/70頁
文件大?。?/td> 560K
代理商: M34282
4282 Group
MITSUBISHI MICROCOMPUTERS
PRELIMINARY
Notice: This is not a final specification.
change.
Some parametric limits are subject to
43
Skip condition
Number of
cycles
Number of
words
Instrunction
code
D
8
D
0
Flag CY
2
16
Skip condition
Number of
cycles
Number of
words
Instrunction
code
D
8
D
0
Flag CY
2
16
Skip condition
Number of
cycles
Number of
words
Instrunction
code
D
8
D
0
Flag CY
2
16
Skip condition
Number of
cycles
Number of
words
Instrunction
code
D
8
D
0
Flag CY
2
16
WRST
(Watchdog timer ReSeT)
0
0
0
0
0
1
1
1
1
0
0
F
1
1
Grouping:
Description:
Initializes the watchdog timer flag (WDF1).
Other operation
Operation:
(WDF1)
0
XAM j
(eXchange Accumulator and Memory data)
0
0
1
1
0
0
0
j
1
j
0
0
6
j
1
1
Grouping:
Description:
After exchanging the contents of M(DP)
with the contents of register A, an exclusive
OR operation is performed between regis-
ter X and the value j in the immediate field,
and stores the result in register X.
RAM to register transfer
Operation:
(A)
←→
(M(DP))
(X)
(X)EXOR(j)
j = 0 to 3
XAMD j
(eXchange Accumulator and Memory data and Decrement register Y and skip)
0
0
1
1
0
1
1
j
1
j
0
0
6
1
1
(Y) = 15
Grouping:
Description:
After exchanging the contents of M(DP)
with the contents of register A, an exclusive
OR operation is performed between regis-
ter X and the value j in the immediate field,
and stores the result in register X.
Subtracts 1 from the contents of register Y.
As a result of subtraction, when the con-
tents of register Y is 15, the next instruction
is skipped.
RAM to register transfer
Operation:
(A)
←→
(M(DP))
(X)
(X)EXOR(j)
j = 0 to 3
(Y)
(Y) – 1
C
+j
XAMI j
(eXchange Accumulator and Memory data and Increment register Y and skip)
0
0
1
1
0
1
0
j
1
j
0
0
6
1
1
(Y) = 0
Grouping:
Description:
After exchanging the contents of M(DP)
with the contents of register A, an exclusive
OR operation is performed between regis-
ter X and the value j in the immediate field,
and stores the result in register X.
Adds 1 to the contents of register Y. As a re-
sult of addition, when the contents of
register Y is 0, the next instruction is
skipped.
RAM to register transfer
Operation:
(A)
←→
(M(DP))
(X)
(X)EXOR(j)
j = 0 to 3
(Y)
(Y) + 1
8
+j
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