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參數(shù)資料
| 型號(hào)： | M36DR432AD |
| 廠商： | 意法半導(dǎo)體 |
| 英文描述： | 32 Mbit 2Mb x16, Dual Bank, Page Flash Memory and 4 Mbit 256Kb x16 SRAM, Multiple Memory Product |
| 中文描述： | 32兆位的2Mb x16插槽，雙行，頁(yè)閃存和4兆位的256Kb x16的SRAM，多個(gè)存儲(chǔ)產(chǎn)品 |
| 文件頁(yè)數(shù)： | 19/52頁(yè) |
| 文件大?。?/td> | 834K |
| 代理商： | M36DR432AD |
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M36DR432AD, M36DR432BD
Table 8. Read Protection Register
Note: X= Don’t care.
Table 9. Program, Erase Times and Program, Erase Endurance Cycles
Note: 1. Excludes the time needed to execute the sequence for program command.
2. Same timing value if V
PPF
= 12V
Flash Block Locking
The Flash memory features an instant, individual
block locking scheme that allows any block to be
locked or unlocked with no latency. This locking
scheme has two levels of protection.
I
Lock/Unlock - this first level allows software-
only control of block locking.
I
Lock-Down - this second level requires
hardware interaction before locking can be
changed.
The protection status of each block can be set to
Locked, Unlocked, and Lock-Down. Table 10, de-
fines all of the possible protection states (WPF,
DQ1, DQ0).
Reading a Block’s Lock Status
The lock status of every block can be read in the
Auto Select mode of the device. Subsequent
reads at the address specified in Table 6, will out-
put the protection status of that block. The lock
status is represented by DQ0 and DQ1. DQ0 indi-
cates the Block Lock/Unlock status and is set by
the Lock command and cleared by the Unlock
command. It is also automatically set when enter-
Word
EF
GF
WF
A20-A8
A7-0
DQ15-8
DQ7-3
DQ2
DQ1
DQ0
Lock
V
IL
V
IL
V
IH
X
80h
XXh
00000b
Security
prot.data
OTP
prot.data
0
Unique ID 0
V
IL
V
IL
V
IH
X
81h
ID data
ID data
ID data
ID data
ID data
Unique ID 1
V
IL
V
IL
V
IH
X
82h
ID data
ID data
ID data
ID data
ID data
Unique ID 2
V
IL
V
IL
V
IH
X
83h
ID data
ID data
ID data
ID data
ID data
Unique ID 3
V
IL
V
IL
V
IH
X
84h
ID data
ID data
ID data
ID data
ID data
OTP 0
V
IL
V
IL
V
IH
X
85h
OTP data
OTP data
OTP data
OTP data
OTP data
OTP 1
V
IL
V
IL
V
IH
X
86h
OTP data
OTP data
OTP data
OTP data
OTP data
OTP 2
V
IL
V
IL
V
IH
X
87h
OTP data
OTP data
OTP data
OTP data
OTP data
OTP 3
V
IL
V
IL
V
IH
X
88h
OTP data
OTP data
OTP data
OTP data
OTP data
Parameter
M36DR432AD, M36DR432BD
Unit
Min
Max
Typ
Typical after
100k W/E Cycles
Parameter Block (4 KWord) Erase (Preprogrammed)
2.5
0.3
1
s
Main Block (32 KWord) Erase (Preprogrammed)
4
0.8
3
s
Bank Erase (Preprogrammed, Bank A)
3
6
s
Bank Erase (Preprogrammed, Bank B)
20
30
s
Chip Program
(1)
20
25
s
Chip Program (Double Word, V
PPF
= 12V)
(1)
8
s
Word Program
(2)
100
10
μs
Double Word Program (V
PPF
= 12V)
100
8
μs
Quadruple Word Program (V
PPF
= 12V)
100
8
μs
Program/Erase Cycles (per Block)
100,000
cycles
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相關(guān)代理商/技術(shù)參數(shù) |
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| M36DR432AD10ZA6T | 功能描述:組合存儲(chǔ)器 32M (2Mx16) 100ns RoHS:否 制造商:Microchip Technology 組織:512 K x 16 電源電壓-最大: 電源電壓-最小: 最大工作溫度:+ 85 C 最小工作溫度:- 20 C 封裝 / 箱體:LFBGA-48 封裝:Tray |
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| M36DR432AD85ZA6T | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:32 Mbit 2Mb x16, Dual Bank, Page Flash Memory and 4 Mbit 256Kb x16 SRAM, Multiple Memory Product |
| M36DR432ADZA | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:32 Mbit 2Mb x16, Dual Bank, Page Flash Memory and 4 Mbit 256Kb x16 SRAM, Multiple Memory Product |
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