39/52
M36DR432AD, M36DR432BD
Figure 19. SRAM Standby AC Waveforms
Table 23. SRAM Read AC Characteristics
)
Note: 1. Sampled only. Not 100% tested.
Symbol
Alt
Parameter
SRAM
Unit
70
Min
Max
t
AVAV
t
RC
Read Cycle Time
70
ns
t
AVQV
t
AA
Address Valid to Output Valid
70
ns
t
AXQX
t
OH
Address Transition to Output Transition
10
ns
t
BHQZ
t
BHZ
UBS, LBS Disable to Hi-Z Output
25
ns
t
BLQV
t
BA
UBS, LBS Access Time
45
ns
t
BLQX
t
BLZ
UBS, LBS Enable to Low-Z Output
5
ns
t
EHQZ
t
HZ
Chip Enable High to Output Hi-Z
25
ns
t
ELQV
t
ACE
Chip Enable Low to Output Valid
70
ns
t
ELQX
t
LZ
Chip Enable Low to Output Transition
5
ns
t
GHQZ
t
OHZ
Output Enable High to Output Hi-Z
25
ns
t
GLQV
t
EO
Output Enable Low to Output Valid
35
ns
t
GLQX
t
OLZ
Output Enable Low to Output Transition
5
ns
t
PD (1)
Chip Enable High to Power Down
70
ns
t
PU (1)
Chip Enable Low to Power Up
0
ns
AI07320
tPD
IDD
tPU
ES