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M36L0R7050T0, M36L0R7050B0
It is not allowed to set E
F
at V
IL,
E1
P
at V
IL
and E2
P
at V
IH
at the same time.
PSRAM Output Enable (G
P
).
The Output En-
able, G
P
, provides a high speed tri-state control,
allowing fast read/write cycles to be achieved with
the common I/O data bus.
PSRAM Write Enable (W
P
).
The Write Enable,
W
P
, controls the Bus Write operation of the device.
PSRAM Upper Byte Enable (UB
P
).
The Upper
Byte Enable, UB
P
, gates the data on the Upper
Byte Data Inputs/Outputs (DQ8-DQ15) to or from
the upper part of the selected address during a
Write or Read operation.
PSRAM Lower Byte Enable (LB
P
).
The Lower
Byte Enable, LB
P
, gates the data on the Lower
Byte Data Inputs/Outputs (DQ0-DQ7) to or from
the lower part of the selected address during a
Write or Read operation.
V
DDF
Supply Voltage.
V
DDF
provides the power
supply to the internal cores of the Flash memory
component. It is the main power supply for all
Flash operations (Read, Program and Erase).
V
DDP
Supply Voltage.
The V
DDP
Supply Volt-
age supplies the power for all PSRAM operations
(Read, Write, etc.) and for driving the refresh logic,
even when the device is not being accessed.
V
DDQ
Supply Voltage.
V
DDQ
provides the power
supply for the Flash Memory I/O pins. This allows
all Outputs to be powered independently of the
Flash Memory core power supply, V
DDF
.
V
PPF
Program Supply Voltage.
V
PPF
is both a
Flash control input and a Flash power supply pin.
The two functions are selected by the voltage
range applied to the pin.
If V
PPF
is kept in a low voltage range (0V to V
DDQ
)
V
PPF
is seen as a control input. In this case a volt-
age lower than V
PPLKF
gives an absolute protec-
tion against Program or Erase, while V
PPF
> V
PP1F
enables these functions (see Tables
7
and
8
, DC
Characteristics for the relevant values). V
PPF
is
only sampled at the beginning of a Program or
Erase; a change in its value after the operation has
started does not have any effect and Program or
Erase operations continue.
If V
PPF
is in the range of V
PPHF
it acts as a power
supply pin. In this condition V
PPF
must be stable
until the Program/Erase algorithm is completed.
V
SS
Ground.
V
SS
is the common ground refer-
ence for all voltage measurements in the Flash
(core and I/O Buffers) and PSRAM chips.
Note: Each Flash memory device in a system
should have their supply voltage (V
DDF
) and
the program supply voltage V
PPF
decoupled
with a 0.1μF ceramic capacitor close to the pin
(high frequency, inherently low inductance ca-
pacitors should be as close as possible to the
package). See
Figure 6., AC Measurement
Load Circuit
. The PCB track widths should be
sufficient to carry the required V
PPF
program
and erase currents.