參數(shù)資料
型號(hào)： M37512F8H-XXXHP
元件分類(lèi)： 微控制器/微處理器
英文描述： 8-BIT, FLASH, 4 MHz, MICROCONTROLLER, PQFP48
封裝： 7 X 7 MM, 0.50 MM PITCH, PLASTIC, LQFP-48
文件頁(yè)數(shù)： 47/89頁(yè)
文件大小： 877K
代理商： M37512F8H-XXXHP
Feb 18, 2005
page 49 of 85
REJ03B0122-0101
7512 Group
Fig. 53 Over current detector registers (2)
b7
Wake up current detect control register 2 (001416)
Reserved (Do not write "1"to this bit)
Wake up calibration enable bit
0
: Disable
1
: Enable
Reserved (Do not write "1"to this bit)
Not used (returns "0" when read)
b0
Note : All bits are protected.
b7
Wake up current detect control register 1 (001216)
Wake up current detect compare voltage select bit
Wake up current detect interrupt enable bit
0
: Disable
1
: Enable
Wake up current detect enable bit
0
: Disable
1
: Enable
b0
b5
b4
b3
b2
b1
b0
0
X
Setting disabled
01000
0
1.04
01000
1
1.05
01001
0
1.06
01001
1
1.07
0.01n+0.88
11110
0
1.48
11110
1
1.49
11111
0
1.50
11111
1
1.51
Wake up current detect
compare voltage select bit n
compare voltage
(V)
Note : All bits are protected.
Wake up current detect flag
0 : Not detected
1: Detected
Discharge over current detect flag
0 : Not detected
1: Detected
Discharge over current detect flag
0 : Not detected
1: Detected
Charge over current detect flag
0 : Not detected
1: Detected
Wake up current detect restart bit
0 : Invalid
1 : Restart
Discharge over current detect restart bit
0 : Invalid
1 : Restart
Discharge short current detect restart bit
0 : Invalid
1 : Restart
Charge over current detect restart bit
0 : Invalid
1 : Restart
b7
Over current detect status register(001316)
b0
Note : All bits are protected.
b7
Charge over current detect control register (0FF016)
Charge over current detect voltage select bit
0000
: 0.025V
1000
: 0.065V
0001
: 0.030V
1001
: 0.070V
0010
: 0.035V
1010
: 0.075V
0011
: 0.040V
1011
: 0.080V
0100
: 0.045V
1100
: 0.085V
0101
: 0.050V
1101
: 0.090V
0110
: 0.055V
1110
: 0.095V
0111
: 0.060V
1111
: 0.100V
Charge over current detect interrupt enable bit
0 : Disable
1 : Enable
Charge FET control polarity switch bit
0 : Active "L" output
1 : Active "H" output
Charge FET control enable bit
0 : FET control disable
1 : FET control enable
Charge over current detect enable bit
0 : Disable
1 : Enable
b0
Note : All bits are protected.
The SFR protect bit control bit is in MISRG register
(address 003816).
b7
Current detect time set up register 2 (0FF116)
Charge over current detect time set up bit
0000
: 1.0ms
1000
: 17.0ms
0001
: 3.0ms
1001
: 19.0ms
0010
: 5.0ms
1010
: 21.0ms
0011
: 7.0ms
1011
: 23.0ms
0100
: 9.0ms
1100
: 25.0ms
0101
: 11.0ms
1101
: 27.0ms
0110
: 13.0ms
1110
: 29.0ms
0111
: 15.0ms
1111
: 31.0ms
DFETCNT-INT2 OR output enable bit
0 : Disable
1 : Enable
INT2 polarity switch bit
0 : invert
1 : not invert
CFETCNT-INT3 OR output enable bit
0 : Disable
1 : Enable
INT3 polarity switch bit
0 : invert
1 : not invert
b0
Note : All bits are protected.
The SFR protect bit control bit is in MISRG register
(address 003816).
Not used (returns "0" when read)
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