83
PRELIMINAR
Y
Notice:
This
is not
a final
specification.
Some
parametric
limits
are
subject
to change.
MITSUBISHI MICROCOMPUTERS
M37754M8C-XXXGP, M37754M8C-XXXHP
M37754S4CGP, M37754S4CHP
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
PERIPHERAL DEVICE INPUT/OUTPUT TIMING (VCC = 5 V±10 %, VCC = 0 V, Ta = –20 to 85 °C, unless otherwise noted)
If the values depends on external clock frequency f(XIN), formulas of the limits are shown below. Also, the values at f(XIN) = 40 MHz in high-
speed running and at f(XIN) = 25 MHz in low-speed running are shown in ( ). At this time, the clock source select bit is “0.” When the clock
source select bit is “1”, regard f(XIN) in tables as 2f(XIN).
The rise and fall time of input signal must be 100 ns or less respectively, unless otherwise noted.
Timer A input (Up-down input in event counter mode)
tc(UP)
tw(UPH)
tw(UPL)
tsu(UP-TIN)
th(TIN-UP)
Symbol
TAiOUT input cycle time
TAiOUT input high-level pulse width
TAiOUT input low-level pulse width
TAiOUT input setup time
TAiOUT input hold time
Parameter
Limits
Min.
2000
1000
400
Max.
ns
Unit
Timer A input (External trigger input in pulse width modulation mode)
tw(TAH)
tw(TAL)
Symbol
TAiIN input high-level pulse width
TAiIN input low-level pulse width
Parameter
Min.
80
Limits
Max.
ns
Unit
Limits
Symbol
Parameter
Min.
Max.
Unit
8
× 109
f(XIN)
4
× 109
f(XIN)
(200)
(160)
tc(TA)
tw(TAH)
tw(TAL)
TAiIN input cycle time
TAiIN input high-level pulse width
TAiIN input low-level pulse width
ns
80
Timer A input (External trigger input in one-shot pulse mode)
Limits
Symbol
Parameter
Min.
Max.
Unit
16
× 109
f(XIN)
8
× 109
f(XIN)
8
× 109
f(XIN)
4
× 109
f(XIN)
8
× 109
f(XIN)
4
× 109
f(XIN)
(400)
(320)
(200)
(160)
(200)
(160)
f(XIN)
≤ 40 MHz
(XIN)
≤ 25 MHz
f(XIN)
≤ 40 MHz
f(XIN)
≤ 25 MHz
f(XIN)
≤ 40 MHz
f(XIN)
≤ 25 MHz
tc(TA)
tw(TAH)
tw(TAL)
TAiIN input cycle time
TAiIN input high-level pulse width
TAiIN input low-level pulse width
ns
Timer A input (Gating input in timer mode)
Note : The TAiIN input cycle time requires 4 or more cycles of count source. The TAiIN input high-level pulse width and the TAiIN input low-level pulse width
respectively require 2 or more cycles of the count source. The limits in the table are the values when the count source is f(XIN)/4 in high-speed running
(f(XIN)
≤ 40 MHz) and when the count source is f(XIN)/2 in low-speed running (f(XIN) ≤ 25 MHz). At this time, the clock source select bit is “0.”
Timer A input (Count input in event counter mode)
tc(TA)
tw(TAH)
tw(TAL)
Symbol
TAiIN input cycle time
TAiIN input high-level pulse width
TAiIN input low-level pulse width
Parameter
Min.
80
40
Limits
Max.
ns
Unit
f(XIN)
≤ 40 MHz
f(XIN)
≤ 25 MHz