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Corrections and Supplementary Explanation for “7902 Group User’s Manual” (REV.A) No.3
P12-17
Figure 12.2.13,
P21-41
(Address AC16)
Serial I/O pin control register (Address AC16)
Bit
Bitname
Function
0
CTS0/RTS0 separate select bit
CTS1/RTS1 separate select bit
P12-23
12.3.3 line 13,
P12-28
12.3.5 line 12,
P12-40
12.4.3 line 12,
P12-47
12.4.5 line 6
By connecting the RTS pin (receiver side) and
CTS pin (transmitter side),
Page
Correction
Error
Serial I/O pin control register (Address AC16)
Bit
Bitname
Function
0
CTS0/RTS0 separate select bit (Note)
1
CTS1/RTS1 separate select bit (Note)
Note: Valid when the CTS/RTS enable bit (bit 4 at
addresses 3416 and 3C16) is “0.”
By connecting the RTSi pin (receiver side) and
CTSi pin (transmitter side),
1
P14-3
Figure 14.2.3,
P21-37
(Addresses
9816 to 9A16)
D-A register i (i = 0 to 2) (Addresses 9816 to 9A16)
Bit
Function
7 to 0 Any value from 0016 through FF16 can be set,
and this value is D-A converted and is output.
P14-3
Figure 14.2.2,
P21-37
(Address 9616)
D-A control register (Address 9616)
Bit
Bit name
Function
0
D-A0 output enable
bit
1
D-A1 output enable
bit
Note: Pin DAi is multiplexed (including programm-
able I/O port pin).
2
D-A2 output enable
bit
0 : Output is disabled.
1 : Output is enabled. (Note)
0 : Output is disabled.
1 : Output is enabled. (Note)
0 : Output is disabled.
1 : Output is enabled. (Note)
Notes 1: Pin DAi is multiplexed (including progra-
mmable I/O port pin).
2: When not using the D-A converter, be sure to
clear the contents of this bit to “0.”
Note: When not using the D-A converter, be sure to
clear the contents of these bits to “0016.”
P14-7
[Precautions for
D-A converter]
Last line
any other multiplexed input/output pin (including
programmable I/O port pin).
4. When not using the D-A converter, be sure to do
as follows:
Clear the D-Ai (i = 0 to 2) output enable bit (bits
0 to 2 at address 9616) to “0.”
Clear the contents of the D-A register i (addre-
sses 9816 to 9A16) to “0016.”
any other multiplexed input/output pin (including
programmable I/O port pin).
D-A control register (Address 9616)
Bit
Bit name
Function
0
D-A0 output enable
bit
1
D-A1 output enable
bit
2
D-A2 output enable
bit
0 : Output is disabled.
1 : Output is enabled. (Notes 1, 2)
0 : Output is disabled.
1 : Output is enabled. (Notes 1, 2)
0 : Output is disabled.
1 : Output is enabled. (Notes 1, 2)
D-A register i (i = 0 to 2) (Addresses 9816 to 9A16)
Bit
Function
7 to 0 Any value from 0016 through FF16 can be set
(Note), and this value is D-A converted and is
output.
P16-2
Table 16.1.1
Item
Stop mode
PLL frequency multiplier
fCPU, fBIU
Operates.
Inactive.
Item
Stop mode
PLL frequency multiplier
φCPU, φBIU
Stopped.
Inactive.