參數(shù)資料
型號: M37905M4C-XXXFP
元件分類: 微控制器/微處理器
英文描述: 16-BIT, MROM, 20 MHz, MICROCONTROLLER, PQFP64
封裝: 14 X 14 MM, 0.80 MM PITCH, PLASTIC, QFP-64
文件頁數(shù): 14/102頁
文件大小: 881K
代理商: M37905M4C-XXXFP
19
M37905M4C-XXXFP, M37905M4C-XXXSP
M37905M6C-XXXFP, M37905M6C-XXXSP
M37905M8C-XXXFP, M37905M8C-XXXSP
PRELIMINAR
Y
Notice:
This
is not
a final
specification.
Some
parametric
limits
are
subject
to change.
16-BIT CMOS MICROCOMPUTER
MITSUBISHI MICROCOMPUTERS
Fig. 9 Bus cycle waveform at access to internal area
1 bus cycle = 3
φ (Note)
(Internal ROM bus cycle select bit = 0)
ROM
RAM
SFR
Internal address bus
Internal data bus,
Internal code bus
φBIU
Address
1 bus cycle = 2
φ
φBIU
Internal address bus
Internal data bus
Internal code bus
Address
1 bus cycle = 2
φ
1 bus cycle = 2
φ
(Internal ROM bus cycle select bit = 1)
φBIU
Internal address bus
Internal data bus,
Internal code bus
Address
Data
1 bus cycle = 3
φ
Data
Note: When reprogramming the internal flash memory in the CPU reprogramming mode, select the bus cycle = 3
φ.
q Number of bus cycles
Figure 9 shows the bus cycle waveform at access to the internal
area. Bit 7 of the processor mode register 1 (address 5F16), which is
shown in Figure 10, selects the number of bus cycles for the internal
ROM: 3
φ or 2φ. (This bit 7 is the internal ROM bus cycle select bit.)
The internal RAM, SFRs (internal peripheral devices’ control regis-
ters) are always accessed with 1 bus cycle = 2
φ.
Fig. 10 Bit configuration of processor mode register 1
7
6
543
2
1
0
Processor mode register 1
Fix these bits to “00000002”.
Address
5F16
Internal ROM bus cycle select bit
0 : 1 bus cycle = 3
φ
1 : 1 bus cycle = 2
φ
0
000
0
相關(guān)PDF資料
PDF描述
M37905M8C-XXXFP 16-BIT, MROM, 20 MHz, MICROCONTROLLER, PQFP64
M37905M8C-XXXSP 16-BIT, MROM, 20 MHz, MICROCONTROLLER, PDIP64
M37905M4C-XXXSP 16-BIT, MROM, 20 MHz, MICROCONTROLLER, PDIP64
M37905M4C-XXXFP 16-BIT, MROM, 20 MHz, MICROCONTROLLER, PQFP64
M37905M8C-XXXFP 16-BIT, MROM, 20 MHz, MICROCONTROLLER, PQFP64
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參數(shù)描述
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