PRELIMINAR
Y
Notice:
This
is not
a final
specification.
Some
parametric
limits
are
subject
to change.
38
M37905M4C-XXXFP, M37905M4C-XXXSP
M37905M6C-XXXFP, M37905M6C-XXXSP
M37905M8C-XXXFP, M37905M8C-XXXSP
16-BIT CMOS MICROCOMPUTER
MITSUBISHI MICROCOMPUTERS
TIMER FUNCTION FOR MOTOR CONTROL
Three-phase motor drive waveform or pulse motor drive waveform
can be output by using plural internal timers As. These modes are
explained bellow.
Three-phase motor drive waveform output
mode (three-phase waveform mode)
Three-phase waveform mode using timers A0, A1, A2 and A3 is se-
lected by setting the waveform output select bits of the waveform
output mode register (bits 2 through 0 at address A616, Figure 41) to
“1002”.
There are two types of the three-phase waveform mode: three-
phase mode 0 and three-phase mode 1. Bit 4 of the waveform out-
put mode register selects either mode. In the three-phase waveform
mode, set the corresponding timer mode registers of timers A0, A1,
and A2 to select the one-shot pulse mode with the rising edge of an
external trigger valid; set the timer mode register of timer A3 to se-
lect the timer mode.
Figure 43 shows the block diagram in the three-phase waveform
mode. The three-phase waveform mode outputs six waveforms,
positive waveforms (U, V, W phases) and negative waveforms (U, V,
W phases), from the respective ports with “L” level active.
Timer A2 controls U and U phases; timer A1 does V and V phases
and timer A0 does W and W phases. Timer A3 controls these one-
shot pulses’ periods of timers A2, A1 and A0.
In the waveform output, a short circuit prevention time can be set to
prevent “L” level of positive waveform outputs (U, V, W phases) from
overlapping with “L” level of their negative waveform outputs (U, V,
W phases). The short circuit prevention time can be set with three 8-
bit dead-time timers, sharing one reload register. The dead-time
timer operates as a one-shot timer. It’s start trigger is selected from
the following two types: both the rising and falling edges of timers A0
to A2’s one-shot pulses or their falling edges. Additionally, bit 6 of the
waveform output mode register (address A616) controls this selec-
tion. When that bit is “0”, both the rising and falling edges are se-
lected; when that bit is “1”, the falling edges are selected.
Timer A0 mode register
5616
Timer A1 mode register
5716
Timer A2 mode register
5816
76543210
0
1
11
0
Address
Timer A3 mode register
5916
76543210
0
Address
Fix to “10” in three-phase
waveform mode
Fix to “0110” in three-phase
waveform mode
Clock source select bits
(See Table 7.)
0
Fix to “000000” in three-phase
waveform mode
Clock source select bits
(See Table 7.)
0
Fig. 42 Bit configuration of timer A0, A1, A2, mode register and
timer A3 mode register in three-phase waveform mode
Waveform output mode register
A616
76543210
0
1
×
Address
Waveform output select bits
100 : Fix to “100” in three-phase
waveform mode
(Valid in three-phase mode 1)
Three-phase output polarity set buffer
0 : “H” output
1 : “L” output
Three-phase mode select bit
0 : Three-phase mode 0
1 : Three-phase mode 1
Not used in three-phase
waveform mode
Dead-time timer trigger select bit
0 : Both edge of one-shot pulse
with timers A2 to A0
1 : Only the falling edge of one-shot
pulse with timers A2 to A0
Waveform output control bit
0 : Waveform output disabled
1 : Waveform output enabled
Fig. 41 Bit configuration of waveform output mode register in three-
phase waveform mode